參數(shù)資料
型號： M30LW128D110ZA1T
廠商： 意法半導體
英文描述： 128 Mbit (two 64Mbit, x8/x16, Uniform Block, Flash Memories) 3V Supply, Multiple Memory Product
中文描述： 128兆位（兩個64兆比特，x8/x16，統(tǒng)一座，快閃記憶體）3V電源，多記憶體產(chǎn)品
文件頁數(shù)： 19/57頁
文件大?。?/td> 860K
代理商： M30LW128D110ZA1T
19/57
M30LW128D
Block Erase Suspend the Read Memory Array
command must be issued to reset the device in
Read mode, then the Erase Resume command
can be issued to complete the whole sequence.
Only the blocks not being erased may be read or
programmed correctly.
See Appendix C, Figure 20, Program Suspend &
Resume Flowchart and Pseudo Code, and Figure
22, Erase Suspend & Resume Flowchart and
Pseudo Code, for suggested flowcharts on using
the Program/Erase Suspend command.
Program/Erase Resume Command.
The
gram/Erase Resume command can be used to re-
start the Program/Erase Controller after a
Program/Erase Suspend operation has paused it.
One Bus Write cycle is required to issue the Pro-
gram/Erase Resume command. The command
must be issued to the same address as the Pro-
gram/Erase Suspend command. Once the com-
mand is issued subsequent Bus Read operations
read the Status Register.
Block Protect Command.
The Block Protect
command is used to protect a block and prevent
Program or Erase operations from changing the
data in it. Two Bus Write cycles are required to is-
sue the Block Protect command; the second Bus
Write cycle latches the block address in the inter-
nal state machine and starts the Program/Erase
Controller. Once the command is issued subse-
quent Bus Read operations read the Status Reg-
ister. See the section on the Status Register for
details on the definitions of the Status Register
bits.
During the Block Protect operation the device will
only accept the Read Status Register command.
All other commands will be ignored. Typical Block
Protection times are given in Table 10.
The Block Protection bits are non-volatile, once
set they remain set through reset and power-
down/power-up. They are cleared by a Blocks Un-
protect command.
See Appendix C, Figure 23, Block Protect Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Block Protect command.
Blocks Unprotect Command.
The Blocks Un-
protect command is used to unprotect all of the
blocks. To unprotect all of the blocks in both of the
internal memories the command must be issued to
both memories, that is first with A23 Low and then
with A23 High.
Four Bus Write cycles are required to issue the
Blocks Unprotect command; the first two are writ-
ten with A23 Low, the second two are written with
A23 High. Once the command is issued subse-
quent Bus Read operations read the Status Reg-
ister. See the section on the Status Register for
Pro-
details on the definitions of the Status Register
bits.
During the Blocks Unprotect operation the device
will only accept the Read Status Register com-
mand. All other commands will be ignored. Typical
Block Protection times are given in Table 10.
See Appendix C, Figure 24, Blocks Unprotect
Flowchart and Pseudo Code, for a suggested flow-
chart on using the Blocks Unprotect command.
Protection Register Program Command.
The Protection Register Program command is
used to Program the 64 bit user segment of the
Protection Register. Only the lower address Pro-
tection Register is available to the customer (A23
Low), the other Protection Register is reserved.
Two write cycles are required to issue the Protec-
tion Register Program command.
I
The first bus cycle sets up the Protection
Register Program command.
I
The second latches the Address and the Data to
be written to the Protection Register and starts
the Program/Erase Controller.
Read operations output the Status Register con-
tent after the programming has started.
The user-programmable segment can be locked
by programming bit 1 of the Protection Register
Lock location to ‘0’ (see Table 8 and x for Word-
wide and Byte-wide protection addressing). Bit 0
of the Protection Register Lock location locks the
factory programmed segment and is programmed
to ‘0’ in the factory. The locking of the Protection
Register is not reversible, once the lock bits are
programmed no further changes can be made to
the values stored in the Protection Register, see
Figure 8, Protection Register Memory Map. At-
tempting to program a previously protected Pro-
tection Register will result in a Status Register
error.
The Protection Register Program cannot be sus-
pended. See Appendix C, Figure 25, Protection
Register Program Flowchart and Pseudo Code,
for the flowchart for using the Protection Register
Program command.
Configure STS Command.
The Configure STS command is used to configure
the Status/(Ready/Busy) pin. It has to be config-
ured for both internal memories, that is the com-
mand has to be issued first with A23 Low and then
with A23 High. After power-up or reset the STS pin
is configured in Ready/Busy mode. The pin can be
configured in Status mode using the Configure
STS command (refer to Status/(Ready/Busy) sec-
tion for more details.
Four Bus Write cycles are required to issue the
Configure STS command. The first two cycles
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