參數(shù)資料
型號(hào)： M30L0R8000B0ZAQT
廠商： 意法半導(dǎo)體
英文描述： 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
中文描述： 256兆位（16Mb的x16插槽，多銀行，多層次，多突發(fā)）1.8V電源快閃記憶體
文件頁(yè)數(shù)： 51/83頁(yè)
文件大小： 1363K
代理商： M30L0R8000B0ZAQT
51/83
M30L0R8000T0, M30L0R8000B0
Table 25. Write AC Characteristics, Write Enable Controlled
Note: 1. Sampled only, not 100% tested.
2. t
WHEL
has this value when reading in the targeted bank or when reading following a Set Configuration Register command. System
designers should take this into account and may insert a software No-Op instruction to delay the first read in the same bank after
issuing any command and to delay the first read to any address after issuing a Set Configuration Register command. If the first read
after the command is a Read Array operation in a different bank and no changes to the Configuration Register have been issued,
t
WHEL
is 0ns.
3. Meaningful only if L is always kept low.
Symbol
Alt
Parameter
M30L0R8000T0/B
Unit
85
W
t
AVAV
t
WC
Address Valid to Next Address Valid
Min
85
ns
t
AVLH
Address Valid to Latch Enable High
Min
7
ns
t
AVWH(3)
Address Valid to Write Enable High
Min
45
ns
t
DVWH
t
DS
Data Valid to Write Enable High
Min
45
ns
t
ELLH
Chip Enable Low to Latch Enable High
Min
10
ns
t
ELWL
t
CS
Chip Enable Low to Write Enable Low
Min
0
ns
t
ELQV
Chip Enable Low to Output Valid
Min
85
ns
t
ELKV
Chip Enable High to Clock Valid
Min
7
ns
t
GHWL
Output Enable High to Write Enable Low
Min
17
ns
t
LHAX
Latch Enable High to Address Transition
Min
7
ns
t
LLLH
Latch Enable Pulse Width
Min
7
ns
t
WHAV(3)
Write Enable High to Address Valid
Min
0
ns
t
WHAX(3)
t
AH
Write Enable High to Address Transition
Min
0
ns
t
WHDX
t
DH
Write Enable High to Input Transition
Min
0
ns
t
WHEH
t
CH
Write Enable High to Chip Enable High
Min
0
ns
t
WHEL(2)
Write Enable High to Chip Enable Low
Min
20
ns
t
WHGL
Write Enable High to Output Enable Low
Min
0
ns
t
WHLL
Write Enable High to Latch Enable Low
Min
0
ns
t
WHWL
t
WPH
Write Enable High to Write Enable Low
Min
20
ns
t
WLWH
t
WP
Write Enable Low to Write Enable High
Min
45
ns
P
t
QVVPL
Output (Status Register) Valid to V
PP
Low
Min
0
ns
t
QVWPL
Output (Status Register) Valid to Write Protect Low
Min
0
ns
t
VPHWH
t
VPS
V
PP
High to Write Enable High
Min
200
ns
t
WHVPL
Write Enable High to V
PP
Low
Min
200
ns
t
WHWPL
Write Enable High to Write Protect Low
Min
200
ns
t
WPHWH
Write Protect High to Write Enable High
Min
200
ns
相關(guān)PDF資料
PDF描述
M30L0R8000B0ZAQ 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30L0R8000T0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQ 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQF 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
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