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    • 參數(shù)資料
      型號: M30L0R8000B0ZAQT
      廠商: 意法半導(dǎo)體
      英文描述: 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
      中文描述: 256兆位(16Mb的x16插槽,多銀行,多層次,多突發(fā))1.8V電源快閃記憶體
      文件頁數(shù): 15/83頁
      文件大?。?/td> 1363K
      代理商: M30L0R8000B0ZAQT
      15/83
      M30L0R8000T0, M30L0R8000B0
      Read Electronic Signature Command
      The Read Electronic Signature command is used
      to read the Manufacturer and Device Codes, the
      Lock Status of the addressed bank, the Protection
      Register, and the Configuration Register.
      One Bus Write cycle is required to issue the Read
      Electronic Signature command. Once a bank is in
      Read Electronic Signature mode, subsequent
      read operations in the same bank will output the
      Manufacturer Code, the Device Code, the Lock
      Status of the addressed bank, the Protection Reg-
      ister, or the Configuration Register (see
      Table 7.
      ).
      The Read Electronic Signature command can be
      issued at any time, even during program or erase
      operations, except during Protection Register Pro-
      gram operations. Dual operations between the Pa-
      rameter bank and the Electronic Signature
      locations are not allowed (see
      Table 15., Dual Op-
      eration Limitations
      for details).
      If a Read Electronic Signature command is issued
      to a bank that is executing a program or erase op-
      eration the bank will go into Read Electronic Sig-
      nature mode. Subsequent Bus Read cycles will
      output the Electronic Signature data and the Pro-
      gram/Erase controller will continue to program or
      erase in the background.
      The Read Electronic Signature command will only
      change the read mode of the addressed bank. The
      read modes of other banks are not affected. Only
      Asynchronous Read and Single Synchronous
      Read operations should be used to read the Elec-
      tronic Signature. A Read Array command is re-
      quired to return the bank to Read Array mode.
      Read CFI Query Command
      The Read CFI Query command is used to read
      data from the Common Flash Interface (CFI).
      One Bus Write cycle is required to issue the Read
      CFI Query command. Once a bank is in Read CFI
      Query mode, subsequent Bus Read operations in
      the same bank will output the contents of the Com-
      mon Flash Interface.
      The Read CFI Query command can be issued at
      any time, even during program or erase opera-
      tions.
      If a Read CFI Query command is issued to a bank
      that is executing a program or erase operation the
      bank will go into Read CFI Query mode. Subse-
      quent Bus Read cycles will output the CFI data
      and the Program/Erase controller will continue to
      program or erase in the background.
      The Read CFI Query command will only change
      the read mode of the addressed bank. The read
      modes of other banks are not affected. Only Asyn-
      chronous Read and Single Synchronous Read op-
      erations should be used to read from the CFI. A
      Read Array command is required to return the
      bank to Read Array mode.
      Dual operations between the Parameter Bank and
      the CFI memory space are not allowed (see
      Table
      15., Dual Operation Limitations
      for details).
      See
      APPENDIX B., COMMON FLASH INTER-
      FACE
      , Tables
      36
      ,
      37
      ,
      38
      ,
      39
      ,
      40
      ,
      42
      ,
      43
      ,
      44
      and
      45
      for details on the information contained in the
      Common Flash Interface memory area.
      Clear Status Register Command
      The Clear Status Register command can be used
      to reset (set to ‘0’) all error bits (SR1, 3, 4 and 5) in
      the Status Register.
      One Bus Write cycle is required to issue the Clear
      Status Register command. The Clear Status Reg-
      ister command does not affect the read mode of
      the bank.
      The error bits in the Status Register do not auto-
      matically return to ‘0’ when a new command is is-
      sued. The error bits in the Status Register should
      be cleared before attempting a new program or
      erase command.
      Block Erase Command
      The Block Erase command is used to erase a
      block. It sets all the bits within the selected block
      to ’1’. All previous data in the block is lost.
      If the block is protected then the erase operation
      will abort, the data in the block will not be changed
      and the Status Register will output the error.
      Two Bus Write cycles are required to issue the
      command.
      The first bus cycle sets up the Block Erase
      command.
      The second latches the block address and
      starts the Program/Erase Controller.
      If the second bus cycle is not the Block Erase Con-
      firm code, Status Register bits SR4 and SR5 are
      set and the command is aborted.
      Once the command is issued the bank enters
      Read Status Register mode and any read opera-
      tion within the addressed bank will output the con-
      tents of the Status Register. A Read Array
      command is required to return the bank to Read
      Array mode.
      During Block Erase operations the bank contain-
      ing the block being erased will only accept the
      Read Array, Read Status Register, Read Electron-
      ic Signature, Read CFI Query and the Program/
      Erase Suspend command, all other commands
      will be ignored.
      The Block Erase operation aborts if Reset, RP,
      goes to V
      IL
      . As data integrity cannot be guaran-
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