deveopmen
A-D Converter
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
162
Item
Performance
Method of A-D conversion
Analog input voltage (Note 1)
Operating clock f
AD
(Note 2)
Successive approximation (capacitive coupling amplifier)
0V to AV
CC
(V
CC
)
V
CC
= 5V
f
AD
/divide-by-2 of f
AD
/divide-by-4 of f
AD
, f
AD
=f(X
IN
)
V
CC
= 3V
divide-by-2 of f
AD
/divide-by-4 of f
AD
, f
AD
=f(X
IN
)
8-bit or 10-bit (selectable)
V
CC
= 5V
Without sample and hold function
±
3LSB
With sample and hold function (8-bit resolution)
±
2LSB
With sample and hold function (10-bit resolution)
AN
0
to AN
7
input :
±
3LSB
ANEX
0
and ANEX
1
input (including mode in which external
operation amp is connected) :
±
7LSB
V
CC
= 3V
Without sample and hold function (8-bit resolution)
±
2LSB
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
and repeat sweep mode 1
8 pins (AN
0
to AN
7
) + 2 pins (ANEX
0
and ANEX
1
)
A-D conversion start condition
Software trigger
A-D conversion starts when the A-D conversion start flag changes to “1”
External trigger (can be retriggered)
A-D conversion starts when the A-D conversion start flag is “1” and the
ADTRG/P9
7
input changes from “H” to “L”
Conversion speed per pin
Without sample and hold function
8-bit resolution: 49 f
AD
cycles, 10-bit resolution: 59 f
AD
cycles
With sample and hold function
8-bit resolution: 28 f
AD
cycles, 10-bit resolution: 33 f
AD
cycles
Resolution
Absolute precision
Operating modes
Analog input pins
A-D Converter
The A-D converter consists of one 10-bit successive approximation A-D converter circuit with a capacitive
coupling amplifier. Pins P10
0
to P10
7
, P9
5
, and P9
6
also function as the analog signal input pins. The
direction registers of these pins for A-D conversion must therefore be set to input. The Vref connect bit (bit
5 at address 0397
16
) can be used to isolate the resistance ladder of the A-D converter from the reference
voltage input pin (V
REF
) when the A-D converter is not used. Doing so stops any current flowing into the
resistance ladder from V
REF
, reducing the power dissipation. When using the A-D converter, start A-D
conversion only after setting bit 5 of 0397
16
to connect V
REF
.
The result of A-D conversion is stored in the A-D registers of the selected pins. When set to 10-bit precision,
the low 8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When set to 8-bit
precision, the low 8 bits are stored in the even addresses.
Table 1.21.1 shows the performance of the A-D converter. Figure 1.21.1 shows the block diagram of the A-
D converter, and Figures 1.21.2 and 1.21.3 show the A-D converter-related registers.
Note 1: Does not depend on use of sample and hold function.
Note 2: When f(X
IN
) is over 10 MHz, the f
AD
frequency must be under 10 MHz by dividing.
Without sample and hold function, set the f
AD
frequency to 250kHz min.
With the sample and hold function, set the f
AD
frequency to 1MHz min.
Table 1.21.1. Performance of A-D converter