deveopmen
Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
293
Example Circuit Application for The Standard Serial I/O Mode 1
The below figure shows a circuit application for the standard serial I/O mode 1. Control pins will vary
according to peripheral unit (programmer), therefore see the peripheral unit (programmer) manual for
more information.
Figure 1.32.21. Example circuit application for the standard serial I/O mode 1
Clock input
BUSY output
Data input
Data output
(1) Control pins and external circuitry will vary according to peripheral unit (programmer). For more
information, see the peripheral unit (programmer) manual.
(2) In this example, the microprocessor mode and standard serial I/O mode are switched via a switch.
RTS1(BUSY)
CLK1
R
X
D1
T
X
D1
CNVss
P5
0
(CE)
P5
5
(EPM)
NMI
M16C/80 Flash
memory version
Full Status Check
Results from executed erase and program operations can be known by running a full status check. Figure
1.32.20 shows a flowchart of the full status check and explains how to remedy errors which occur.
Read status register
SR4=1 and SR5
=1
NO
Command
sequence error
YES
SR5=0
YES
Block erase error
NO
SR4=0
YES
Program error (page
or lock bit)
NO
SR3=0
YES
Program error
(block)
NO
End (block erase, program)
Execute the clear status register command (50
16
)
to clear the status register. Try performing the
operation one more time after confirming that the
command is entered correctly.
Should a block erase error occur, the block in error
cannot be used.
Execute the read lock bit status command (71
16
) to
see if the block is locked. After removing lock,
execute write operation in the same way. If the
error still occurs, the page in error cannot be used.
After erasing the block in error, execute write
operation one more time. If the same error still
occurs, the block in error cannot be used.
Note: When one of SR5 to SR3 is set to 1, none of the page program, block erase, erase all unlock
blocks and lock bit program commands is accepted. Execute the clear status register command
(50
16
) before executing these commands.
Figure 1.32.20. Full status check flowchart and remedial procedure for errors