Serial I/O
deeopmen
Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
88
Figure 1.15.1. Block diagram of UARTi (i = 0 to 2)
n0 : Values set to UART0 bit rate generator (BRG0)
n1 : Values set to UART1 bit rate generator (BRG1)
n2 : Values set to UART2 bit rate generator (BRG2)
RxD
2
Reception
control circuit
Transmission
control circuit
1 / (n
2
+1)
1/16
1/16
1/2
Bit rate generator
(address 0379
16
)
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
Receive
clock
Transmit
clock
CLK
2
CTS
2
/ RTS
2
f
1
f
8
f
32
Vcc
RTS
2
CTS
2
TxD
2
(UART2)
RxD polarity
reversing circuit
TxD
polarity
reversing
circuit
RxD
0
1 / (n
0
+1)
1/2
Bit rate generator
(address 03A1
16
)
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
Receive
clock
Transmit
clock
CLK
0
Clock source selection
f
1
f
8
f
32
CTS
0
/ RTS
0
Reception
control circuit
Transmission
control circuit
Internal
External
Vcc
RTS
0
CTS
0
TxD
0
Transmit/
receive
unit
RxD
1
1 / (n
1
+1)
1/16
1/16
1/2
Bit rate generator
(address 03A9
16
)
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
Receive
clock
Transmit
clock
CLK
1
Clock source selection
f
1
f
8
f
32
Reception
control circuit
Transmission
control circuit
Internal
External
RTS
1
CTS
1
TxD
1
(UART1)
(UART0)
CLK
polarity
reversing
circuit
CLK
polarity
reversing
circuit
CTS/RTS disabled
Clock output pin
select switch
CTS
1
/ RTS
1
/
CLKS
1
CTS/RTS disabled
CTS/RTS selected
CTS/RTS disabled
V
CC
CTS/RTS disabled
CTS/RTS selected
CTS/RTS disabled
CTS/RTS disabled
CTS/RTS
selected
CLK
polarity
reversing
circuit
Internal
External
Clock source selection
Transmit/
receive
unit
Transmit/
receive
unit
1/16
1/16