23
Clock Output
M
i
t
s
u
M
S
b
i
s
3
M
h
0
I
C
i
m
2
R
i
1
O
c
r
8
C
o
c
o
G
M
m
p
r
P
u
t
u
T
e
r
p
R
s
o
U
S
I
N
G
L
E
-
C
H
I
P
1
6
-
B
I
T
C
M
O
O
E
Clock Output
The clock output function select bit (bit 0,1 at address 0006
16
) allows you to choose the clock from f
8
, f
32
, or
f
c
to be output from the P9
7
/DA
0
/CLK
OUT
/DIM
OUT
pin. When the WAIT peripheral function clock stop bit
(bit 2 at address 0006
16
) is set to “1”, the output of f
8
and f
32
stop by executing of WAIT instruction.
Stop Mode
Writing “1” to the all-clock stop control bit (bit 0 at address 0007
16
) stops all oscillation and the microcom-
puter enters stop mode. In stop mode, the content of the internal RAM is retained provided that V
CC
re-
mains above 2V.
Because the oscillation of BCLK, f
1
to f
32
, fc, f
C32
, and f
AD
stops in stop mode, peripheral functions such as
the fluorescent display function, serial I/O 2, A-D converter and watchdog timer do not function. However,
timer A and timer B operate provided that the event counter mode is set to an external pulse, and UART0
and UART2 functions provided an external clock is selected. Table 3 shows the status of the ports in stop
mode.
Stop mode is cancelled by a hardware reset or an interrupt. If an interrupt is to be used to cancel stop mode,
that interrupt must first have been enabled. If returning by an interrupt, that interrupt routine is executed.
When shifting from high-speed/medium-speed mode to stop mode and at a reset, the main clock division
select bit 0 (bit 6 at address 0006
16
) is set to “1”. When shifting from low-speed/low power dissipation mode
to stop mode, the value before stop mode is retained.
Table 3. Port status during stop mode
Pin
States
Retains status before stop mode
“H”
Retains status before stop mode
Port
CLK
OUT
When f
C
selected
When f
8
, f
32
selected
Wait Mode
When a WAIT instruction is executed, BCLK stops and the microcomputer enters the wait mode. In this mode,
oscillation continues but BCLK and watchdog timer stop. Writing “1” to the WAIT peripheral function clock
stop bit and executing a WAIT instruction stops the clock being supplied to the internal peripheral functions,
allowing power dissipation to be reduced. Table 4 shows the status of the ports in wait mode.
Wait mode is cancelled by a hardware reset or an interrupt. If an interrupt is used to cancel wait mode, the
microcomputer restarts from the interrupt routine using as BCLK, the clock that had been selected when the
WAIT instruction was executed.
Table 4. Port status during wait mode
Pin
States
Port
Retains status before wait mode
CLK
OUT
When f
C
selected
Does not stop
When f
8
, f
32
selected
Does not stop when the WAIT
peripheral function clock stop bit is
“0”. (Note)
When the WAIT peripheral function clock
stop bit is “1”, the status immediately prior
to entering wait mode is maintained.
Note: Attention that reducing the power dissipation is impossible.