236
Clock-Synchronous Serial I/O
M
i
t
s
u
M
S
b
i
s
3
M
h
0
I
C
i
m
2
R
i
1
O
c
r
8
C
o
c
o
G
M
m
p
r
P
u
t
u
T
e
r
p
R
s
o
U
S
I
N
G
L
E
-
C
H
I
P
1
6
-
B
I
T
C
M
O
O
E
2.4.3 Operation of the Serial I/O (transmission in clock-synchronous serial I/O
mode, transfer clock output from multiple pins function selected)
Note 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is
selected, UART1 CTS/RTS function cannot be utilized. Set the UART1 CTS/RTS disable bit to “1”.
(1) Setting the transmit enable bit to “1” makes data transmissible status ready.
(2) When transmission data is written to the UART1 transmit buffer register, transmission data
held in the UART1 transmit buffer register is transmitted to the UART1 transmit register in
synchronization with the first falling edge of the transfer clock. At this time, the first bit of the
transmission data is transmitted from the TxD1 pin. Then the data is transmitted bit by bit
from the lower order in synchronization with the falling edges of the transfer clock.
(3) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”,
which indicates that the transmission is completed. The transfer clock stops at “H” level. At
this time, the UART1 transmit interrupt request bit goes to “1”.
(4) Setting CLK/CLKS select bit 1 to “1” and setting CLK/CLKS select bit 0 to “1” causes the
CLKS1 pin to go to the transfer clock output pin. Change the transfer clock output pin when
transmission is halted.
Operation
In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table
2.4.2. Operations of the circled items are described below. Figure 2.4.8 shows the operation timing, and
Figures 2.4.9 and 2.4.10 show the set-up procedures.
Table 2.4.2. Choosed functions
Item
Item
Set-up
Set-up
Transfer clock
source
CLK polarity
Internal clock (f
1
/ f
8
/ f
32
)
External clock (CLKi pin)
CTS function
CTS function enabled
CTS function disabled
Output transmission data at
the falling edge of the
transfer clock
Output transmission data at
the rising edge of the
transfer clock
LSB first
O
O
O
Transmission
interrupt factor
Transmission buffer empty
Transmission complete
Output transfer clock
to multiple pins
(Note 1)
Not selected
Selected
O
O
Transfer clock
MSB first
O