參數(shù)資料
型號(hào): M2V64S40DTP-8L
廠商: Mitsubishi Electric Corporation
英文描述: 64M Synchronous DRAM
中文描述: 6400同步DRAM
文件頁(yè)數(shù): 41/52頁(yè)
文件大?。?/td> 674K
代理商: M2V64S40DTP-8L
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
A
0-9 *
A
10
DQM(U/L)
A
11
Apr. '99
SDRAM (Rev.1.2)
M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT)
M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT)
M2V64S40BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 1048576-WORD x 16-BIT)
64M bit Synchronous DRAM
* A9 (x8) and A8,A9 (x16) for column address of read/write are don't care
41
Write Interrupted by Write / Read @BL=4
/CS
/RAS
/CAS
/WE
CKE
BA0,1
DQ
X
X
X
0
Y
0
D0
D0
D0
D0
ACT#0
WRITE#0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
tRCD
Q0
WRITE#1
CLK
X
X
X
1
tRRD
1
Y
D0
D0
D1
D1
Q0
Q0
Q0
ACT#1
WRITE#0
Y
Y
0
0
0
Y
tCCD
CL=3
WRITE#0
READ#0
Burst Write can be interrupted by Write or Read of any active bank.
Italic parameter
indicates minimum case
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