參數(shù)資料
型號(hào)： M2S12D30TP
廠商： Mitsubishi Electric Corporation
英文描述： 512M Double Data Rate Synchronous DRAM
中文描述： 512M雙數(shù)據(jù)速率同步DRAM
文件頁(yè)數(shù)： 24/38頁(yè)
文件大?。?/td> 754K
代理商： M2S12D30TP
MITSUBISHI
ELECTRIC
-24-
M2S12D20/ 30TP -75, -75L, -10, -10L
512M Double Data Rate Synchronous DRAM
Feb. '02
MITSUBISHI LSIs
DDR SDRAM (Rev.1.1)
MITSUBISHI ELECTRIC
After tRCD from the bank activation, a READ command can be issued. 1st Output data is available
after the /CAS Latency from the READ, followed by (BL-1) consecutive data. (BL:Burst Length)
The start address is specified by A12-A11,A9-A0(x4)/A11,A9-A0(x8), and the address sequence of
burst data is defined by the Burst Type. A READ command may be applied to any active bank, so
the row precharge time (tRP) can be hidden during the continuous burst data by interleaving the
multiple banks. When A10 is high in READ command, the auto-precharge (READA) is performed.
Any command(READ,WRITE,PRE,ACT) asserted to the same bank is inhibited till the internal
precharge is completed. The internal precharge operation starts at BL/2 time after READA command.
The next ACT command can be issued after (BL/2+tRP) time from the previous READA.
READ
Multi Bank Interleaving READ (BL=8, CL=2)
/CLK
CLK
Command
A0-9,11-12
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
READ
Y
0
10
ACT
Xb
Xb
10
PRE
0
00
tRCD
/CAS latency
Burst Length
DQS
Qa0
Qa1
Qa2
Qa3
Qa4
Qa5
Qa6
Qa7
Qb0
Qb1
Qb2
Qb3
Qb4
Qb5
Qb7
Qb8
相關(guān)PDF資料
PDF描述
M2S12D30TP-75L 512M Double Data Rate Synchronous DRAM
M2S12D20TP-75 128 x 64 pixel format, LED Backlight available
M2V12D20TP-75 128 x 64 pixel format, LED Backlight available
M2S12D30TP-75 128 x 64 pixel format, LED Backlight available
M2V12D30TP-75 128 x 64 pixel format, LED Backlight available
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2S12D30TP-10 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM
M2S12D30TP-10L 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM
M2S12D30TP-75 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM
M2S12D30TP-75L 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM
M2S150-1FC1152I 制造商:Microsemi Corporation 功能描述:SMARTFUSION2 SOC FPGA - Trays
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