參數(shù)資料
型號(hào)： M2S12D30TP-75
廠商： Mitsubishi Electric Corporation
英文描述： 128 x 64 pixel format, LED Backlight available
中文描述： 512M雙數(shù)據(jù)速率同步DRAM
文件頁數(shù)： 17/38頁
文件大?。?/td> 754K
代理商： M2S12D30TP-75
MITSUBISHI
ELECTRIC
-17-
M2S12D20/ 30TP -75, -75L, -10, -10L
512M Double Data Rate Synchronous DRAM
Feb. '02
MITSUBISHI LSIs
DDR SDRAM (Rev.1.1)
MITSUBISHI ELECTRIC
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70
o
C, Vdd = VddQ = 2.5V +0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70
o
C, Vdd = VddQ = 2.5V +0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
Min.
Max.
VIH(AC) High-Level Input Voltage (AC)
VIL(AC) Low-Level Input Voltage (AC)
VID(AC) Input Differential Voltage, CLK and /CLK
VIX(AC) Input Crossing Point Voltage, CLK and /CLK
IOZ
Off-state Output Current /Q floating Vo=0~VddQ
II
Input Current / VIN=0 ~ VddQ
IOH
Output High Current (VOUT = VTT+0.84V)
IOL
Output High Current (VOUT = VTT-0.84V)
Vref + 0.31
Vref - 0.31
VddQ + 0.6
0.7
7
8
0.5*VddQ - 0.2 0.5*VddQ + 0.2
-5
-2
-16.8
16.8
5
2
μ
A
μ
A
mA
mA
Notes
Limits
V
V
V
Symbol
Parameter / Test Conditions
Unit
V
-75
140
-10
130
x4
x8
140
130
x4
150
140
x8
160
6
150
6
x4
30
25
x8
30
15
25
12
x4
45
35
x8
45
35
x4
190
140
x8
220
170
x4
180
150
x8
210
180
IDD5
AUTO REFRESH CURRENT: t RC = t RFC (MIN)
x4/x8
x4/x8
x4/x8
x4
x8
280
6
4
380
400
260
6
4
300
320
IDD6
SELF REFRESH CURRENT: CKE < 0.2V Standard
Low Power (-75L,-10L)
20
20
IDD0
IDD1
OPERATING CURRENT: One Bank; Active-Read-Precharge;
Burst = 2; t RC = t RC MIN; CL = 2.5; t CK = t CK MIN; IOUT= 0mA;
Address and control inputs changing once per clock cycle
Symbol
Organization
Parameter/Test Conditions
OPERATING CURRENT: One Bank; Active-Precharge; t RC = t RC MIN; t CK
= t CK MIN; DQ, DM and DQS inputs changing twice per clock cycle; address
and control inputs changing once per clock cycle
x4/x8
IDD4R
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;One bank active;
Address and control inputs changing once per clock cycle;CL=2.5; t CK = t CK
MIN; IOUT = 0 mA
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; power-
down mode; CKE <VIL (MAX); t CK = t CK MIN
ACTIVE STANDBY CURRENT: /CS > VIH (MIN); CKE > VIH (MIN); One
bank; Active-Precharge; t RC = t RAS MAX; t CK = t CK MIN; DQ,DM and
DQS inputs changing twice per clock cycle; address and other control inputs
changing once per clock cycle
IDD3N
IDD2P
IDD2F
IDLE STANDBY CURRENT: /CS > VIH (MIN); All banks idle;
CKE > VIH (MIN); t CK = t CK MIN; Address and other control inputs changing
once per clock cycle
Unit
Notes
mA
Limits(Max.)
IDD7
OPERATING CURRENT-Four bank Operation: Four bank interleaving with
BL=4 -Refer to the Notes 20
IDD4W
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank active;
Address and control inputs changing once per clock cycle; CL=2.5; t CK = t CK
MIN;DQ, DM and DQS inputs changing twice per clock cycle
x4/x8
IDD3P
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; power-
down mode; CKE < VIL (MAX); t CK = t CK MIN
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參數(shù)描述
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