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參數(shù)資料
| 型號(hào)： | M29W022BB55K6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，啟動(dòng)塊低壓?jiǎn)坞娫撮W存 |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大小： | 123K |
| 代理商： | M29W022BB55K6T |
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M29W022BT, M29W022BB
Table 6. Commands
Note: X Don’t Care, PA Program Address, PD Program Data, BA Any address in the Block.
All values in the table are in hexadecimal.
The Command Interface only uses address bits A0-A10 to verify the commands, the upper address bits are Don’t Care.
Read/Reset.
After a Read/Reset command, read the memory as normal until another command is issued.
Auto Select.
After an Auto Select command, read Manufacturer ID, Device ID or Block Protection Status.
Program, Unlock Bypass Program, Chip Erase, Block Erase.
After these commands read the Status Register until the Program/Erase
Controller completes and the memory returns to Read Mode. Add additional Blocks during Block Erase Command with additional Bus Write
Operations until the Timeout Bit is set.
Unlock Bypass.
After the Unlock Bypass command issue Unlock Bypass Program or Unlock Bypass Reset commands.
Unlock Bypass Reset.
After the Unlock Bypass Reset command read the memory as normal until another command is issued.
Erase Suspend.
After the Erase Suspend command read non-erasing memory blocks as normal, issue AutoSelect and Program commands
on non-erasing blocks as normal.
Erase Resume.
After the Erase Resume command the suspended Erase operation resumes, read the Status Register until the Program/
Erase Controller completes and the memory returns to Read Mode.
Command
L
Bus Write Operations
1st
2nd
3rd
4th
5th
6th
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/Reset
1
X
F0
3
555
AA
2AA
55
X
F0
Auto Select
3
555
AA
2AA
55
555
90
Program
4
555
AA
2AA
55
555
A0
PA
PD
Unlock Bypass
3
555
AA
2AA
55
555
20
Unlock Bypass
Program
2
X
A0
PA
PD
Unlock Bypass Reset
2
X
90
X
00
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Block Erase
6+
555
AA
2AA
55
555
80
555
AA
2AA
55
BA
30
Erase Suspend
1
X
B0
Erase Resume
1
X
30
Chip Erase Command.
The Chip Erase com-
mand canbeused to erasethe entirechip. Six Bus
Write operations are required to issue the Chip
Erase Command and start the Program/Erase
Controller.
If any blocks are protected then these are ignored
and all the other blocks are erased. If all of the
blocks are protected the Chip Erase operation ap-
pears tostart but will terminate withinabout100
μ
s,
leaving the data unchanged. No error condition is
given when protected blocks are ignored.
During the erase operation the memory will ignore
all commands. It is not possible to issue any com-
mand to abort the operation. Typical chip erase
times are given in Table 7. All Bus Read opera-
tions during the Chip Erase operation will output
the Status Register on the Data Inputs/Outputs.
See the section on the Status Register for more
details.
After the Chip Erase operation has completed the
memory will return to the Read Mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read Mode.
TheChip Erase Command sets allof the bits inun-
protected blocks of the memory to ’1’. All previous
data is lost.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M29W022BB55NZ1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W022BB55NZ6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W022BB70K1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W022BB70K6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W022BB70NZ1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
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