參數(shù)資料
型號: M29DW128F60NF6
廠商: 意法半導(dǎo)體
英文描述: 128 Mbit (16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block) 3V Supply, Flash Memory
中文描述: 128兆位(16Mb的x8或和8Mb x16插槽,多行,頁,引導(dǎo)塊)3V電源,快閃記憶體
文件頁數(shù): 15/93頁
文件大?。?/td> 719K
代理商: M29DW128F60NF6
M29DW128F
2 Signal descriptions
15/93
2.7
Write Enable (W)
The Write Enable pin, W, controls the Bus Write operation of the memory’s Command Interface.
2.8
V
PP/
Write Protect (V
PP
/WP)
The V
PP
/Write Protect
pin provides two functions. The V
PP
function allows the memory to use
an external high voltage power supply to reduce the time required for Program operations. This
is achieved by bypassing the unlock cycles and/or using the multiple Word (2 or 4 at-a-time) or
multiple Byte Program (2, 4 or 8 at-a-time) commands.
The Write Protect function provides a hardware method of protecting the four outermost boot
blocks (two at the top, and two at the bottom of the address space). When V
PP
/Write Protect is
Low, V
IL
, the memory protects the four outermost boot blocks; Program and Erase operations in
these blocks are ignored while V
PP
/Write Protect is Low, even when RP is at V
ID
.
When V
PP
/Write Protect
is High, V
IH
, the memory reverts to the previous protection status of
the four outermost boot blocks. Program and Erase operations can now modify the data in
these blocks unless the blocks are protected using Block Protection.
Applying V
PPH
to the V
PP
/WP pin will temporarily unprotect any block previously protected
(including the four outermost parameter blocks) using a High Voltage Block Protection
technique (In-System or Programmer technique). See
Table 9: Hardware Protection
for details.
When V
PP
/Write Protect is raised to V
PP
the memory automatically enters the Unlock Bypass
mode. When V
PP
/Write Protect returns to V
IH
or V
IL
normal operation resumes. During Unlock
Bypass Program operations the memory draws I
PP
from the pin to supply the programming
circuits. See the description of the Unlock Bypass command in the Command Interface section.
The transitions from V
IH
to V
PP
and from V
PP
to V
IH
must be slower than t
VHVPP
, see
Figure 20
.
Never raise V
PP
/Write Protect to V
PP
from any mode except Read mode, otherwise the
memory may be left in an indeterminate state.
The V
PP
/Write Protect pin must not be left floating or unconnected or the device may become
unreliable. A 0.1μF capacitor should be connected between the V
PP
/Write Protect pin and the
V
SS
Ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during Unlock Bypass Program, I
PP
.
2.9
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all the blocks previously protected using a High Voltage
Block Protection technique (In-System or Programmer technique).
Note that if V
PP
/WP is at V
IL
, then the four outermost parameter blocks will remain protected
even if RP is at V
ID
.
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
IL
, for at
least t
PLPX
. After Reset/Block Temporary Unprotect goes High, V
IH
, the memory will be ready
for Bus Read and Bus Write operations after t
PHEL
or t
RHEL
, whichever occurs last. See the
Ready/Busy Output section,
Table 30: Reset/Block Temporary Unprotect AC Characteristics
and
Figure 18
and
Figure 19
for more details.
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