參數(shù)資料
型號: M25PX32-VMF6F
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 55/63頁
文件大小: 394K
代理商: M25PX32-VMF6F
M25PX32
DC and AC parameters
55/63
Figure 30.
Serial input timing
t
W
Write Status Register cycle time
1.3
15
ms
t
PP(8)
Page Program cycle time (256 bytes)
0.8
5
ms
Page Program cycle time (n bytes)
int(n/8) × 0.025
(9)
Program OTP cycle time (64 bytes)
0.2
ms
t
SSE
Subsector Erase cycle time
70
150
ms
t
SE
Sector Erase cycle time
1
3
s
t
BE
Bulk Erase cycle time
34
80
s
Bulk Erase cycle time (V
PP
= V
PPH
)
17
1.
Preliminary data.
2.
Typical values given for T
A
= 25° C.
t
CH
+ t
CL
must be greater than or equal to 1/ f
C
Value guaranteed by characterization, not 100% tested in production.
3.
4.
5.
Expressed as a slew-rate.
6.
Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.
7.
V
should be kept at a valid level until the program or erase operation has completed and its result
(success or failure) is known.
8.
When using the Page Program (PP) instruction to program consecutive bytes, optimized timings are
obtained with one sequence including all the bytes versus several sequences of only a few bytes. (1
n
256)
9.
int(A) corresponds to the upper integer part of A. E.g. int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
Table 17.
AC characteristics
(1)
(continued)
Test conditions specified in
Table 13
and
Table 14
Symbol
Alt.
Parameter
Min.
Typ.
(2)
Max.
Unit
C
DQ0
AI13728
S
MSB IN
DQ1
tDVCH
High Impedance
LSB IN
tSLCH
tCHDX
tCHCL
tCLCH
tSHCH
tSHSL
tCHSH
tCHSL
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