參數(shù)資料
型號: M25PX32-VMF6F
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 34/63頁
文件大?。?/td> 394K
代理商: M25PX32-VMF6F
Instructions
M25PX32
34/63
6.8
Dual Output Fast Read (DOFR)
The Dual Output Fast Read (DOFR) instruction is very similar to the Read Data Bytes at
higher speed (FAST_READ) instruction, except that the data are shifted out on two pins (pin
DQ0 and pin DQ1) instead of only one. Outputting the data on two pins instead of one
doubles the data transfer bandwidth compared to the Read Data Bytes at higher speed
(FAST_READ) instruction.
The device is first selected by driving Chip Select (S) Low. The instruction code for the Dual
Output Fast Read instruction is followed by a 3-byte address (A23-A0) and a dummy byte,
each bit being latched-in during the rising edge of Serial Clock (C). Then the memory
contents, at that address, are shifted out on DQ0 and DQ1 at a maximum frequency f
C
,
during the falling edge of Serial Clock (C).
The instruction sequence is shown in
Figure 15
.
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out on DQ0 and DQ1. The whole
memory can, therefore, be read with a single Dual Output Fast Read (DOFR) instruction.
When the highest address is reached, the address counter rolls over to 00 0000h, so that
the read sequence can be continued indefinitely.
Figure 15.
Dual Output Fast Read instruction sequence
1.
A23 to A22 are Don't care.
2
1
3
4
5
6
7
8
9 10
28 29 30 31
0
23 22 21
3
2
1
0
Mode 3
Mode 2
C
DQ0
S
DQ1
High Impedance
Instruction
24-bit address
C
DQ0
S
DQ1
32 33 34
36 37 38 39 40 41 42 43 44 45 46
7
5
3
1
7
5
1
3
DATA OUT 1
Dummy byte
MSB
7
5
3
1
7
5
3
1
MSB
MSB
47
6
4
2
0
6
4
0
2
35
6
4
2
0
6
4
0
2
MSB
MSB
DATA OUT 2
DATA OUT 3
DATA OUT n
ai13574
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