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參數(shù)資料
| 型號： | M14C04DD |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | M14C04 Die Description |
| 中文描述： | M14C04模具描述 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 108K |
| 代理商： | M14C04DD |
M14C16, M14C04
2/13
uses a bi-directional data bus and serial clock. The
memory carries a built-in 7-bit unique Device Type
Identifier code (1010xxx, for the M14C16, and
101000x, for the M14C04, as shown in Table 3) in
accordance with the I
2
C bus definition. Only one
memory can be attached to each I
2
C bus.
The memory behaves as a slave device in the I
2
C
protocol, with all memory operations synchronized
by the serial clock. Read and write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by
the Device Select Code which is composed of a
stream of 7 bits (1010xxx, for the M14C16, and
101000x, for the M14C04, as shown in Table 3),
plus one read/write bit (R/W) and is terminated by
an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
th
bit time,
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoACK for READ.
Power On Reset: V
CC
Lock-Out Write Protect
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the V
CC
voltage has reached the
POR threshold value, and all operations are dis-
abled – the device will not respond to any com-
mand. In the same way, when V
CC
drops from the
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid V
CC
must be applied before applying any logic signal.
SIGNAL DESCRIPTION
Serial Clock (SCL)
The SCL input pin is used to synchronize all data
in and out of the memory. A pull up resistor can be
connected from the SCL line to V
CC
. (Figure 3 in-
dicates how the value of the pull-up resistor can be
calculated).
Serial Data (SDA)
The SDA pin is bi-directional, and is used to trans-
fer data in or out of the memory. It is an open drain
output that may be wire-OR’ed with other open
drain or open collector signals on the bus. A pull
up resistor must be connected from the SDA bus
to V
CC
. (Figure 3 indicates how the value of the
pull-up resistor can be calculated).
Write Control (WC)
The hardware Write Control contact (WC) is useful
for protecting the entire contents of the memory
from inadvertent erase/write. The Write Control
signal is used to enable (WC=V
IL
) or disable
Figure 2. D20 Contact Connections
AI02168
VCC
GND
SCL
SDA
WC
Table 2. Absolute Maximum Ratings
1
Note: 1.
Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100 pF, 1500
)
3. EIAJ IC-121 (Condition C) (200 pF, 0
)
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
0 to 70
°C
T
STG
Storage Temperature
Wafer form
Module form
-65 to 150
-40 to 120
°C
V
IO
Input or Output range
-0.6 to 6.5
V
V
CC
Supply Voltage
-0.3 to 6.5
V
V
ESD
Electrostatic Discharge Voltage (Human Body model)
2
4000
V
Electrostatic Discharge Voltage (Machine model)
3
400
V
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