- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377801 > M12S128168A (Elite Semiconductor Memory Technology Inc.) 2M x 16 Bit x 4 Banks Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | M12S128168A |
| 廠商： | Elite Semiconductor Memory Technology Inc. |
| 英文描述： | 2M x 16 Bit x 4 Banks Synchronous DRAM |
| 中文描述： | 200萬(wàn)× 16位× 4個(gè)銀行同步DRAM |
| 文件頁(yè)數(shù)： | 25/44頁(yè) |
| 文件大?。?/td> | 967K |
| 代理商： | M12S128168A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)當(dāng)前第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)
ES MT
FUNCTION TURTH TABLE (TABLE 1)
M12S128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.0
Publication Date
:
Nov. 2006
25/44
Current
State
IDLE
Row
Active
Read
Write
Read with
Auto
Precharge
Write with
Auto
Precharge
CS
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
RAS CAS
X
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
X
H
H
H
H
L
L
L
X
H
H
H
H
L
L
L
X
H
H
H
L
L
X
H
H
H
L
L
WE
BA
ADDR
ACTION
Note
X
H
H
L
H
H
L
L
X
H
H
L
L
H
H
L
X
H
H
L
L
H
H
L
X
H
H
L
L
H
H
L
X
H
H
L
H
L
X
H
H
L
H
L
X
H
L
X
H
L
H
L
X
H
L
H
L
H
L
X
X
H
L
H
L
H
L
X
X
H
L
H
L
H
L
X
X
H
L
X
X
X
X
H
L
X
X
X
X
X
BA
BA
BA
X
X
X
X
NOP
NOP
ILLEGAL
2
2
4
5
5
2
2
3
2
3
3
2
3
2
2
CA, A10/AP ILLEGAL
RA
A10/AP
X
OP code
X
X
X
CA, A10/AP Begin Read ; latch CA ; determine AP
CA, A10/AP Begin Write ; latch CA ; determine AP
RA
ILLEGAL
A10/AP
Precharge
X
ILLEGAL
X
NOP (Continue Burst to End
Row Active)
X
NOP (Continue Burst to End
Row Active)
X
Term burst
Row active
CA, A10/AP Term burst, New Read, Determine AP
CA, A10/AP Term burst, New Write, Determine AP
RA
ILLEGAL
A10/AP
Term burst, Precharge timing for Reads
X
ILLEGAL
X
NOP (Continue Burst to End
Row Active)
X
NOP (Continue Burst to End
Row Active)
X
Term burst
Row active
CA, A10/AP Term burst, New Read, Determine AP
CA, A10/AP Term burst, New Write, Determine AP
RA
ILLEGAL
A10/AP
Term burst, Precharge timing for Writes
X
ILLEGAL
X
NOP (Continue Burst to End
Row Active)
X
NOP (Continue Burst to End
Row Active)
X
ILLEGAL
CA, A10/AP ILLEGAL
RA, RA10
ILLEGAL
X
ILLEGAL
X
NOP (Continue Burst to End
Row Active)
X
NOP (Continue Burst to End
Row Active)
X
ILLEGAL
CA, A10/AP ILLEGAL
RA, RA10
ILLEGAL
X
ILLEGAL
Row (&Bank) Active ; Latch RA
NOP
Auto Refresh or Self Refresh
Mode Register Access
NOP
NOP
ILLEGAL
OP code
X
X
X
BA
BA
BA
BA
X
X
X
X
BA
BA
BA
BA
X
X
X
X
BA
BA
BA
BA
X
X
X
X
BA
BA
X
X
X
X
BA
BA
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12S128168A-10TG | 2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12S16161A-7BG | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-7TG | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12S64322A | 512K x 32 Bit x 4 Banks Synchronous DRAM |
| M12S64322A-6BG | 512K x 32 Bit x 4 Banks Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12S128168A_08 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12S128168A-10BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12S128168A-10TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12S128168A-6BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12S128168A-6TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。