參數(shù)資料
型號(hào): M12L2561616A-7BG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 4M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝: 8 X 13 MM, LEAD FREE, BGA-54
文件頁(yè)數(shù): 19/44頁(yè)
文件大?。?/td> 908K
代理商: M12L2561616A-7BG
ES MT
M12L2561616A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.2
Publication Date
:
Aug. 2007
19/44
*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.
5. Write Interrupted by Precharge & DQM
*Note : 1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.
2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge interrupt
but only another bank precharge of four banks operation.
CLK
i ) C M D
i i ) C M D
i i i ) C M D
i v) C M D
DQ M
DQ M
DQ M
DQ M
DQ
DQ
DQ
DQ
D1
D3
D1
D0
D2
D3
D0
D2
W R
(b) CL=3,BL= 4
R D
W R
R D
W R
D1
D3
D0
D2
D1
D3
D0
D2
R D
W R
H i - Z
D1
D3
D0
D2
Q0
*Not e 1
v) C M D
DQ M
DQ
R D
W R
H i - Z
R D
C LK
CMD
DQM
DQ
D1
W R
* N ot e 3
*
M a s k e d
b y
D Q M
D3
t
RDL(m in)
P RE
N o t e 2
D0
D2
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