參數(shù)資料
型號(hào): LXT9880AGE
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù): 13/96頁(yè)
文件大小: 1309K
代理商: LXT9880AGE
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
Datasheet
13
Table 4. Inter-Repeater Backplane Signal Descriptions
Pin
Symbol
Type
1
Description
Common IRB Signals
199
MMSTRIN
TTL Input
PD, NC
Management Master Input.
The Management Master (MM) daisy chain ensures that
collisions are counted correctly in multi-board applications. Attach the MMSTRIN input
of each device to the MMSTROUT output of the previous device. Ground MMSTRIN of
the first or only device.
63
MMSTROUT
TTL Output
Management Master Output.
MM daisy chain output. In hot-swap applications, a
1 k
- 3 k
resistor can be used as a by-pass between MMSTRIN and MMSTROUT.
100 Mbps IRB Signals (Refer to Figure 22 on page 57)
36
IR100CFS
Analog I/O
100 Mbps IRB Collision Force Sense.
A
three-level signal that determines number of
active ports on the
logical
repeater. High level (5V) indicates no ports active; Mid level
(approx. 2.8V) indicates one port active; Low level (0V) indicates more than one port
active, resulting in a collision. This signal requires a 2
40
pull-up resistor, and connects
between chips on the same board.
37
IR100CFSBP
Analog I/O
NC
100 Mbps IRB Collision Force Sense - Backplane.
This three-level signal functions
the same as IRCFS; however, it connects between chips with ChipID=0, on different
boards. IR100CFSBP requires a single
91
pull-up resistor on each stack.
38
IR100SNGL
Schmitt
CMOS I/O
PU
100 Mbps Single Driver State.
This active Low signal is asserted by the device with
ChipID = 000 when a packet is being received from one or more ports. This signal
should not be connected between boards.
40
IR100COL
Schmitt
CMOS I/O
PU
100 Mbps Multiple Driver State.
This active Low signal is asserted by the device with
ChipID = 000 when a packet is being received from more than one port (collision). It
should not be connected between boards.
41
IR100DEN
TTL Output
OD
100 Mbps IRB Driver Enable.
This output provides directional control for an external
bidirectional transceiver (
245) used to buffer the 100 Mbps IRB in multi-board
applications. It must be pulled up by a 330
resistor. When there are multiple devices
on one board, tie all IR100DEN outputs together. If IR100DEN is tied directly to the DIR
pin on a
245, attach the on-board IR100DAT, IR100CLK, and IR100DV signals to the
B
side of the
245, and connect the off-board signals to the
A
side of the
245.
42
IR100DV
Schmitt
CMOS I/O
OD, PU
100 Mbps IRB Data Valid.
This active Low signal indicates port activity on the
repeater. IR100DV frames the clock and data of the packet on the backplane. This
signal requires a 120
pull-up resistor.
43
44
45
46
49
IR100DAT0
IR100DAT1
IR100DAT2
IR100DAT3
IR100DAT4
Tri-state
Schmitt
CMOS I/O
PU
100 Mbps IRB Data.
These bidirectional signals carry data on the 100 Mbps IRB. Data
is driven on the falling edge and sampled on the rising edge of IR100CLK. These
signals can be buffered between boards.
52
IR100CLK
Tri-state
Schmitt
CMOS I/O
PD
100 Mbps IRB Clock.
This bidirectional, non-continuous, 25 MHz clock is recovered
from received network traffic. Schmitt triggering is used to increase noise immunity. This
signal must be pulled to VCC when idle. One 1 k
pull-up resistor on both side of a
245
buffer is recommended.
56
IR100ISO
TTL Output
100 Mbps Stack Backplane Isolate.
This output allows one LXT980 per Board the
ability to enable or disable an external bidirectional transceiver (
245). Attach the output
to the Enable input of the
245. The output is driven High (disable) to isolate the
100 Mbps IRB.
1. NC = No Clamp. Pad will not clamp input in the absence of power.
PU = Input contains pull-up.
PD = Input contains pull-down.
I/O = Input / Output.
OD = Open Drain
TTL = Transistor-Transistor Logic
Even if the IRB is not used, required pull-up resistors must be installed as listed above.
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