參數(shù)資料
型號(hào): LXT9863HC
英文描述: LAN HUB CONTROLLER
中文描述: 局域網(wǎng)集線器控制器
文件頁(yè)數(shù): 91/96頁(yè)
文件大?。?/td> 1309K
代理商: LXT9863HC
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
Datasheet
91
-
Table 72. Device/Revision Register Bit Assignment
31:28
27:12
11:8
7:1
0
Version
Part No.
Jedec Continuation Characters
JEDEC ID
1
1st in Chain
2
0100
(LXT980)
0000 0011 1101 0100
0000
111 1110
See Note 2
0110
(LXT980A)
1. The JEDEC ID is an 8-bit identifier. However, the MSB is for parity only and is ignored.
Intel
s JEDEC ID is FE (1111 1110) which becomes 111 1110.
2. First Chain Bit = 0 if ChipID
000.
First Chain Bit = 1 if ChipID = 000.
Table 73. Global LED Control Register Bit Assignments
31:6
5
4
3
2
1:0
Reserved
Mode Control
Global Fault LED
Reserved
Table 74. Port LED Control Register Bit Assignments
31:10
9
8
7
6
5
4
3
2
1
0
Rsvd
Port 5 (MII)
Port 4
Port 3
Port 2
Port 1
Table 75. LED Timer Control Register Bit Assignments
31:16
15:8
7:0
Reserved
Slow Blink Frequency
Fast Blink Frequency
1. Period = 7.8125 ms x (Register Value + 1)
2.Frequency
s
ms
Table 76. Address Assignment Register Bit Assignments
Assign
Addr 1
31:0
Bits (47:16) of the EPROM Serial number
Assign
Addr 2
31:21
20:16
15:0
Zeros
Hub ID(4:0)
Bits (15:0) of the EPROM serial number
Table 77. EPROM Address Register Bit Assignments
EPROM
Addr 1
31:0
Bits(47:16) of the EPROM serial number
EPROM
Addr 2
31:16
15:0
Zero
s
Bits (15:0) of the EPROM serial number
RegisterValue
1
+
)
)
7.8125m
-----------------------------------------------------------------------+
=
2.
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