參數(shù)資料
型號： LXT9863HC
英文描述： LAN HUB CONTROLLER
中文描述： 局域網(wǎng)集線器控制器
文件頁數(shù)： 46/96頁
文件大小： 1309K
代理商： LXT9863HC
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
46
Datasheet
2.7
Serial EEPROM Interface
The serial EEPROM interface has been designed to allow the vendor to load in optional
information unique to each board. Items such as serial number or date of manufacture can be
placed in the serial EEPROM which is also used in the address arbitration process. Each board
must contain a unique set of information. Additionally, only 1 serial EEPROM is required per
board, they are not required per chip. The LXT980 reads in the first 48 bits (three 16-bit words) out
of the EEPROM and stores them in a register. This read occurs only on power-up as this
information is static. Only the LXT980 with a ChipID of 000 will drive the serial EEPROM control
lines; all other LXT980s will listen in on the data and clock lines. The first bit to be shifted into the
LXT980 from this interface would correspond to bit 47, while the last would be 0. The serial
EEPROM shifts out the most significant bit (15) of the word first (the EEPROM must be auto-
incrementing).
Figure 12. Address Arbitration Mechanisms
Network
Manager
Serial I/F to Next Module
SRX/STX
Hub Board 1
Serial
EEPROM
LXT980
SRX/STX
PROMDTI/O
LXT980
SRX/STX
PROMDTI/O
Hub Board 2
Serial
EEPROM
LXT980
SRX/STX
PROMDTI/O
LXT980
SRX/STX
PROMDTI/O
EPROM Mechanism
for Address Arbitration
1
LXT980
ARBIN
ARBOUT
Network
Manager
ARBOUT
Serial I/F to Next Module
SRX/STX
LXT980
ARBIN
ARBOUT
SRX/STX
0
SRX/STX
Hub Board 1
1
LXT980
ARBIN
ARBOUT
SRX/STX
1
LXT980
ARBIN
ARBOUT
SRX/STX
0
Hub Board 2
ARBI/O Chain to Next Module
0
Chain Mechanism for
Address Arbitration
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