參數(shù)資料
型號(hào): LXT9785BC
英文描述: LAN TRANSCEIVER|OCTAL|BGA|241PIN|PLASTIC
中文描述: 網(wǎng)絡(luò)收發(fā)器|八路|的BGA | 241PIN |塑料
文件頁(yè)數(shù): 27/68頁(yè)
文件大?。?/td> 1177K
代理商: LXT9785BC
Low-Power Octal PHY
LXT9784
Datasheet
27
W3
TXEN0
I
Transmit Enable, Ports 0-7.
The transmit enable
signal indicates to the LXT9784 that valid data is
present on the TXD[1:0] pins of the appropriate port.
T1
TXEN1
R3
TXEN2
M1
TXEN3
H1
TXEN4
F2
TXEN5
D1
TXEN6
B2
TXEN7
L1
TXD4
I
Fifth Transmit Data Bit.
When the LXT9784 is in a
4B5B by-pass mode, the TXD4 pin is used as the fifth
transmit data bit of all eight ports. This signal allows for
limited symbol interface functionality.
Table 9. SMII Mode Signal Descriptions
Ball ID
Signal Name
Type
1
Signal Description
V3
RXD0
O
Receive Data and Control, Ports 0-7.
Receive data stream,
that contains all of the information found on the receive path of
the standard MII.
U1
RXD1
P3
RXD2
N1
RXD3
G1
RXD4
G2
RXD5
C1
RXD6
C2
RXD7
W2
TXD0
I
Transmit Data and Control, Ports 0-7.
Transmit data stream,
that contains all of the information found on the transmit path
of the standard MII.
T2
TXD1
R2
TXD2
M2
TXD3
J3
TXD4
F3
TXD5
E3
TXD6
B3
TXD7
L1
SYNC
I
Synchronization.
Defines the SMII segment boundaries.
1. Refer to
Table 1 on page 11
for Signal Type Definitions.
Table 8. RMII Mode Signal Descriptions (Continued)
Ball ID
Signal Name
Type
1
Signal Description
1. Refer to
Table 1 on page 11
for Signal Type Definitions.
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