參數(shù)資料
型號: LXT9782
英文描述: Interface IC
中文描述: 接口IC
文件頁數(shù): 59/68頁
文件大?。?/td> 1177K
代理商: LXT9782
Low-Power Octal PHY
LXT9784
Datasheet
59
4.6
Clock Specifications
4.6.1
MCLK Specifications
MCLK is the LXT9784 master clock. It is externally sourced by an oscillator.
Table 41
defines the
LXT9784 requirements from this signal.
Figure 26. Master Clock Specifications
Figure 27. Master Clock Slope Specifications
Table 41. MCLK Specifications
Parameter
Symbol
Min
Typ
Max
Units
Condition
MCLK Duty Cycle
T60 (T
MCLK_DC
)
35
65
%
MCLK period
T61 (T
MCLK_PR
)
20
ns
RMII
Mode - 50 MHz
MCLK period
T61 (T
MCLK_PR
)
8
ns
SMII
Mode - 125 MHz
MCLK slope
T62 (T
MCLK_SL
)
3
V/ns
MCLK jitter
T63 (T
MCLK_JIT
)
100
ps
Peak
1. The MCLK frequency shall be ±50 PPM.
2. Trace characteristic impedance (Z
0
), 60W ±10%.
T60
T60
T61
1.4v
T62
T62
90%
10%
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