參數(shù)資料
型號(hào)： LXT917QC
英文描述： LAN Transceiver
中文描述： 網(wǎng)絡(luò)收發(fā)器
文件頁(yè)數(shù)： 20/42頁(yè)
文件大?。?/td> 561K
代理商： LXT917QC
LXT914
—
Flexible Quad Ethernet Repeater
20
Datasheet
2.4.2
External Management Mode Initialization
The LXT914 operates in the External management mode when the LOC/EXT pin is tied Low. In
the External mode, the serial port is a bidirectional interface between the LXT914 and an external
management device (EMD). The serial port is used to download initial setup parameters to the
repeater and to monitor status reports from the repeater. The LXT914 setup parameters can be
changed at any time by the EMD. The initialization process for each repeater in a managed mode
configuration is the same, regardless of its position; each repeater is connected directly to the
EMD. Each LXT914 initializes as follows:
1. Syncs to the 10 MHz Serial Clock (SCLK) input. SCLK must be supplied from an external
source.
2. Responds to SENI Low by enabling the SDI port.
3. Clocks 48 bits from the EMD into its setup register through the SDI port.
4. Once initialized, the LXT914 reports its status in a 48-bit serial stream after every packet
transmission or interrupt event. Refer to
Table 11
and
Table 12
for packet status register bit
assignments and definitions.
Table 9. Setup Register Bit Assignments
Register
D7
D6
D5
D4
D3
D2
D1
D0
SR(0)
DISLI3
DISLI2
DISLI1
DISAP4
DISAP3
DISAP2
DISAP1
DISAPA
SR(1)
DISTX2
DISTX1
DISTXA
DPRC4
DPRC3
DPRC2
DPRC1
DISLI4
SR(2)
ERSQ1
DISRX4
DISRX3
DISRX2
DISRX1
DISRXA
DISTX4
DISTX3
SR(3)
DFIFOE
DPFRM
DSQE
DMCV
ERXJAB
ERSQ4
ERSQ3
ERSQ2
SR(4)
RES
RES
RES
RES
RES
RES
RES
RES
SR(5)
RES
RES
RES
RES
RES
RES
RES
RES
Table 10. Setup Register Bit Definitions
Bit
Definition
DISAP
x
1 = Disable Auto-Partitioning on Port
x
DISLI
x
1 = Disable Link Integrity on Port
x
(Twisted-pair ports only)
DPRC
x
1 = Disable Polarity Reverse detection and Correction on Port
x
(Twisted-pair ports only)
DISTX
x
1 = Disable Transmit on Port
x
DISRX
x
1 = Disable Receive on Port
x
ERSQ
x
1 = Enable Reduced Squelch on Port
x
(Twisted-pair ports only)
ERXJAB
1 = Enable Receive JAB (Long Packet) (Global)
DMCV
1 = Disable entering Tx Collision state on reception of Manchester Code Violation
DSQE
1 = Disable Signal Quality Error to provide heartbeat (AUI port only)
DPFRM
1 = Disable End-of-Frame checking for polarity correction (Global)
DFIFOE
1 = Disable entering Tx Collision state on FIFO over/underflow condition (Global)
DMJLP
1 = Disable MJLP counter (Global)
RES
Reserved. Must be set to 0.
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