- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369885 > LXT363LE PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC PDF資料下載
參數(shù)資料
| 型號： | LXT363LE |
| 英文描述： | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC |
| 中文描述： | 的PCM收發(fā)器|單|的T 1（DS1的）|的CMOS | QFP封裝| 44PIN |塑料 |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 1187K |
| 代理商： | LXT363LE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
LXT361
—
Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
20
Datasheet
With NLOOP detection enabled, the receiver looks for the NLOOP data patterns (00001 = enable,
001 = disable) in the input data stream. When the receiver detects an NLOOP enable data pattern
repeated for a minimum of five seconds, the device enables RLOOP. The device responds to both
framed and unframed NLOOP patterns. Once NLOOP detection is enabled at the chip and
activated by the appropriate data pattern, it is identical to Remote loopback (RLOOP). NLOOP is
disabled by receiving the 001 pattern for five seconds, or by activating RLOOP or ALOOP, or by
disabling NLOOP detection. The device goes into Dual loopback mode (DLOOP) in the case
where it detects both the NLOOP and LLOOP functions.
3.5.1.5
Dual Loopback
See
Figure 8
. To select Dual loopback (DLOOP) set bits CR2.ERLOOP and CR2.ELLOOP to 1. In
DLOOP mode, the transmit clock and data inputs (TCLK and TPOS/TNEG or TDATA) loop back
through the Jitter Attenuator (unless disabled) to RCLK and RPOS/RNEG or RDATA. The data
and clock recovered from the twisted-pair line loop back through the transmit circuits to TTIP and
TRING without jitter attenuation.
3.5.2
Internal Pattern Generation and Detection
3.5.2.1
Transmit All Ones
See
Figure 9
. In Transmit All Ones (TAOS) mode the transceiver ignores the TPOS and TNEG
inputs and transmits a continuous stream of 1s at the TCLK frequency. (With no TCLK, the TAOS
output clock is MCLK.) This can be used as the Alarm Indication Signal (AIS
–
also called the Blue
Alarm). TAOS is commanded by writing a 1 to bit CR2.ETAOS. Both TAOS and Local loopback
can occur simultaneously as shown in
Figure 4
, however, Remote loopback inhibits TAOS. When
both TAOS and LLOOP are active, TCLK and TPOS/TNEG loop back to RCLK and RPOS/RNEG
through the jitter attenuator (if enabled), and an all ones pattern goes to TTIP/TRING.
Figure 8. Dual Loopback
Figure 9. TAOS Data Path
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT363PE | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|LDCC|28PIN|PLASTIC |
| LXT363QE | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC |
| LXT360LE | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| LXT360PE | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| LXT384BE | Telecomm/Datacomm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT363PE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|LDCC|28PIN|PLASTIC |
| LXT363QE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC |
| LXT36X/35X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LXT36x/35x - LXT36x/35x Master Clock Requirements |
| LXT380/4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LXT380/4 - LXT380/4 Octal T1/E1 LIUs Interfacing with the Transwitch Octal Framers |
| LXT380/LXT381 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LXT380/LXT381 - LXT380/1 Frequently Asked Questions |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。