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參數(shù)資料
| 型號： | LTNT |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 24-Bit No Latency ADC with Differential Input and Reference in MSOP |
| 中文描述： | 24位不具有差動輸入和ADC的參考延遲，采用MSOP |
| 文件頁數(shù)： | 16/40頁 |
| 文件大小： | 503K |
| 代理商： | LTNT |
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LTC2411/LTC2411-1
16
Figure 5. External Serial Clock, Single Cycle Operation
Table 4. LTC2411/LTC2411-1 Interface Timing Modes
Conversion
Cycle
Control
CS and SCK
SCK
CS
↓
Continuous
Data
Output
Control
CS and SCK
SCK
CS
↓
Internal
Connection
and
Waveforms
Figures 5, 6
Figure 7
Figures 8, 9
Figure 10
SCK
Source
External
External
Internal
Internal
Configuration
External SCK, Single Cycle Conversion
External SCK, 2-Wire I/O
Internal SCK, Single Cycle Conversion
Internal SCK, 2-Wire I/O, Continuous Conversion
EOC
BIT 31
SDO
SCK
(EXTERNAL)
CS
TEST EOC
SUB LSB
MSB
SIG
BIT 0
LSB
BIT 5
BIT 27
BIT 26
BIT 28
BIT 29
BIT 30
SLEEP
DATA OUTPUT
CONVERSION
2411 F05
CONVERSION
Hi-Z
Hi-Z
Hi-Z
TEST EOC
TEST EOC
V
CC
F
O
REF
+
REF
–
SCK
IN
+
IN
–
GND
SDO
CS
1
10
2
3
9
4
5
6
8
7
REFERENCE
VOLTAGE
0.1V TO V
CC
ANALOG INPUT RANGE
–0.5V
REF
TO 0.5V
REF
= 50Hz REJECTION (LTC2411)
= EXTERNAL OSCILLATOR
= 60Hz REJECTION (LTC2411)
= SIMULTANEOUS 50Hz/60Hz REJECTION (LTC2411-1)
V
CC
1
μ
F
2.7V TO 5.5V
LTC2411/
LTC2411-1
3-WIRE
SPI INTERFACE
Finally, CS can be used to control the free-running modes
of operation, see Serial Interface Timing Modes section.
Grounding CS will force the ADC to continuously convert
at the maximum output rate selected by F
O
.
SERIAL INTERFACE TIMING MODES
The LTC2411/LTC2411-1’s 3-wire interface is SPI and
MICROWIRE compatible. This interface offers several
flexible modes of operation. These include internal/exter-
nal serial clock, 2- or 3-wire I/O, single cycle conversion.
The following sections describe each of these serial inter-
face timing modes in detail. In all these cases, the
converter can use the internal oscillator (F
O
= LOW or F
O
= HIGH) or an external oscillator connected to the F
O
pin.
Refer to Table4 for a summary.
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 5.
The serial clock mode is selected on the falling edge of CS.
To select the external serial clock mode, the serial clock pin
(SCK) must be LOW during each CS falling edge.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is pulled LOW, EOC is output to the SDO pin.
EOC=1 while a conversion is in progress and EOC = 0 if
the device is in the sleep state. Independent of CS, the
APPLICATIOU
W
U
U
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