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參數(shù)資料
| 型號： | LTNN |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 24-Bit No Latency ADC with Differential Input and Reference in MSOP |
| 中文描述： | 24位不具有差動輸入和ADC的參考延遲，采用MSOP |
| 文件頁數(shù)： | 31/40頁 |
| 文件大?。?/td> | 503K |
| 代理商： | LTNN |
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LTC2411/LTC2411-1
31
APPLICATIOU
W
U
U
INPUT SIGNAL FREQUENCY (Hz)
I
2411 F32
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
f
N
0
2f
N
3f
N
4f
N
5f
N
6f
N
7f
N
8f
N
INPUT SIGNAL FREQUENCY (Hz)
250f
N
252f
N
254f
N
256f
N
258f
N
260f
N
262f
N
I
2411 F33
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
Figure 32. Input Normal Mode Rejection
Figure 33. Input Normal Mode Rejection
INPUT FREQUENCY (Hz)
0
15 30 45 60 75 90 105 120 135 150 165 180 195 210 225 240
N
2411 F34
0
–20
–40
–60
–80
–100
–120
V
CC
= 5V
V
REF
= 5V
V
INCM
= 2.5V
V
IN(P-P)
= 5V
F
O
= GND
T
A
= 25
°
C
MEASURED DATA
CALCULATED DATA
INPUT FREQUENCY (Hz)
0
25
50
75
100
125
150
175
200
N
2411 F35
0
–20
–40
–60
–80
–100
–120
V
CC
= 5V
V
REF
= 5V
V
INCM
= 2.5V
V
IN(P-P)
= 5V
F
O
= 5V
T
A
= 25
°
C
MEASURED DATA
CALCULATED DATA
Figure 34. Input Normal Mode Rejection
vs Input Frequency (LTC2411)
Figure 35. Input Normal Mode Rejection
vs Input Frequency (LTC2411)
Figure32 (rejection near DC) and Figure33 (rejection at
f
S
= 256f
N
) where f
N
represents the notch frequency.
These curves have been derived for the external oscillator
mode but they can be used in all operating modes by
appropriately selecting the f
N
value.
The user can expect to achieve in practice this level of
performance using the internal oscillator as it is demon-
strated by Figures 34 to 36. Typical measured values of the
normal mode rejection of the LTC2411 operating with an
internal oscillator and a 60Hz notch setting are shown in
Figure 34 superimposed over the theoretical calculated
curve. Similarly, typical measured values of the normal
mode rejection of the LTC2411 operating with an internal
oscillator and a 50Hz notch setting are shown in Figure 35
superimposed over the theoretical calculated curve.
As a result of these remarkable normal mode specifica-
tions, minimal (if any) antialias filtering is required in front
of the LTC2411/LTC2411-1. If passive RC components
are placed in front of the LTC2411/LTC2411-1, the input
dynamic current should be considered (see Input Current
section). In cases where large effective RC time constants
are used, an external buffer amplifier may be required to
minimize the effects of dynamic input current.
Traditional high order delta-sigma modulators, while pro-
viding very good linearity and resolution, suffer from
potential instabilities at large input signal levels. The pro-
prietary architecture used for the LTC2411/LTC2411-1
third order modulator resolves this problem and guaran-
tees a predictable stable behavior at input signal levels of
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