RF 28 2 3 11 GND 10 MUTE 9 RF+" />
參數(shù)資料
型號: LTC6946IUFD-1#PBF
廠商: Linear Technology
文件頁數(shù): 4/30頁
文件大?。?/td> 0K
描述: IC INTEGER-N PLL W/VCO 28-QFN
軟件下載: PLLWizard™
PLLWizard™, with .NET 2.0 installer
標(biāo)準(zhǔn)包裝: 73
類型: 時鐘/頻率合成器(RF/IF),分?jǐn)?shù)-N,整數(shù)-N,
PLL:
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/是
頻率 - 最大: 3.74GHz
除法器/乘法器: 是/是
電源電壓: 3.15 V ~ 5.25 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-QFN(4x5)
包裝: 管件
LTC6946
12
6946fa
BLOCK DIAGRAM
RF
28
2
3
11
GND
10
MUTE
9
RF+
12
VRF
+
13
27
REF
REFO
≤250MHz
≤100MHz
÷1 TO 1023
÷1 TO 6, 50%
÷32 TO 65535
0.373GHz TO
5.79GHz
MUTE
1
VREFO
+
REF+
26
VREF
+
R_DIV
LOCK
PFD
O_DIV
N_DIV
B_DIV
CAL, ALC
CONTROL
2.24GHz TO 3.74GHz (LTC6946-1) OR
3.08GHz TO 4.91GHz (LTC6946-2) OR
3.84GHz TO 5.79GHz (LTC6946-3)
TUNE
15
CP
VVCO
+
GND
CMA
CMB
CMC
GND
250μA TO
11.2mA
25
22
21
20
19
18
17
24
VCP
+
23
GND
16
TB
6946 BD
14
BB
SERIAL
PORT
STAT
CS
7
SDO
SDI
SCLK
8
VD
+
6
5
4
OPERATION
The LTC6946 is a high performance PLL complete with
a low noise VCO available in three different frequency
range options. The output frequency range may be further
extended by utilizing the output divider (see Available Op-
tions table, for more details). The device is able to achieve
superior integrated phase noise by the combination of
its extremely low in-band phase noise performance and
excellent VCO noise characteristics.
REFERENCE INPUT BUFFER
The PLL’s reference frequency is applied differentially on
pins REF+ and REF. These high impedance inputs are
self-biased and must be AC-coupled with 470pF capacitors
(see Figure 1 for a simplified schematic). Alternatively, the
inputs may be used single ended by applying the refer-
ence frequency at REF+ and bypassing REFto GND with
a 470pF capacitor.
A high quality signal must be applied to the REF± inputs as
they provide the frequency reference to the entire PLL. To
achieve the part’s in-band phase noise performance, apply
27
28
4.2k
REF+
REF
4.2k
6946 F01
1.9V
BST
BIAS
VREF
+
VREF
+
LOWPASS
FILT[1:0]
Figure 1. Simplified REF Interface Schematic
a CW signal of at least 6dBm into 50Ω, or a square wave
of at least 0.5VP-P with slew rate of at least 40V/μs.
Additional options are available through serial port register
h08 to further refine the application. Bits FILT[1:0] control
the reference input buffer’s lowpass filter, and should be
set based upon fREF to limit the reference’s wideband
noise. The FILT[1:0] bits must be set correctly to reach
the LM(NORM) normalized in-band phase noise floor. See
Table 1 for recommended settings.
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LTC6946IUFD-2#PBF 功能描述:IC INTEGER-N PLL W/VCO 28-QFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
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LTC6946IUFD-3#PBF 功能描述:IC INTEGER-N PLL W/VCO 28-QFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
LTC6946IUFD-3#TRPBF 功能描述:IC INTEGER-N PLL W/VCO 28QFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML,PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤,16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?(3x3) 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
LTC6946-x 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 20Msps Low Noise Dual ADC