參數(shù)資料
型號: LTC6603CUF#TRPBF
廠商: Linear Technology
文件頁數(shù): 7/24頁
文件大?。?/td> 0K
描述: IC FILTER LOWPASS 24-QFN
標(biāo)準(zhǔn)包裝: 2,500
濾波器類型: 低通
頻率 - 截止或中心: 80MHz
濾波器數(shù): 2
濾波器階數(shù): 9th
電源電壓: 2.7 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 帶卷 (TR)
LTC6603
15
6603fa
APPLICATIONS INFORMATION
GAIN1 and GAIN0 are the gain control bits (register bits
D6 and D7 when in serial mode). Their function is shown
in Table 1. In serial mode, register bit D1 can be set to 1
to put the device into a low power shutdown mode. Reg-
ister bit D0 is a general purpose output (Pin 21) when in
serial mode.
Table 1. Gain Control
GAIN 1
GAIN 0
PASSBAND GAIN
(dB)
00
0
01
6
10
12
11
24
Self-Clocking Operation
The LTC6603 features a unique internal oscillator which sets
the lter cutoff frequency using a single external resistor
connected to the RBIAS pin. The clock frequency is deter-
mined by the following simple formula (see Figure 5):
fCLK = 247.2MHz 10k/RBIAS
Note: RBIAS ≤ 200k
The design is optimized for V+A, V+D = 3V, fCLK = 45MHz,
where the lter cutoff frequency error is typically <3%
when a 0.1% external 54.9k resistor is used (any resis-
tor (RBIAS) tolerance, will shift the clock frequency). With
different resistor values and cutoff frequency control set-
tings (LPF1 and LPF0), the lowpass cutoff frequency can
Figure 5. RBIAS vs Desired Clock Frequency
be accurately varied from 24.14kHz to 2.5MHz. Table 2
summarizes the cutoff frequencies that can be obtained
with an external resistor (RBIAS) value of 30.9k. Note that
the cutoff frequencies scale with the clock frequency. For
example, if LPF1 and LPF0 are both equal to zero, and
RBIAS is increased from 30.9k to 200k, fCLK will decrease
from 80MHz to 12.36MHz and the cutoff frequency will
be reduced from 156.25kHz to 24.14kHz. The cutoff
frequencies that can be obtained with external resistor
values of 54.9k and 200k are shown in Table 3 and Table 4,
respectively. When the LTC6603 is programmed for the
cutoff frequencies lower than the maximum, the power is
automatically reduced. The power savings at the middle
bandwidth setting (LPF1 = 0, LPF0 = 1), is about 23%,
while the power savings at the lowest bandwidth setting
(LPF1 = 0, LPF0 = 0) is about 60%.
Table 2. Cutoff Frequency Control, RBIAS = 30.9k, fCLK = 80MHz
LPF1
LPF0
LOWPASS BW(kHz)
0
156.25
0
1
625
1
0
2500
1
2500
Table 3. Cutoff Frequency Control, RBIAS = 54.9k, fCLK = 45MHz
LPF1
LPF0
LOWPASS BW(kHz)
0
87.94
0
1
351.78
1
0
1407
1
1407
Table 4. Cutoff Frequency Control, RBIAS = 200k, fCLK = 12.36MHz
LPF1
LPF0
LOWPASS BW(kHz)
0
24.14
0
1
96.56
1
0
386.25
1
386.25
DESIRED CLOCK FREQUENCY (MHz)
R
BIAS
(kΩ)
6603 F05
200
175
75
50
100
125
150
25
10
80
20
30
40
50
60
70
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