參數(shù)資料
型號(hào): LTC4259A
廠商: Linear Technology Corporation
英文描述: Quad IEEE 802.3af Power over Ethernet Controller with AC Disconnect
中文描述: 四IEEE 802.3af標(biāo)準(zhǔn)與AC電源斷開以太網(wǎng)控制器
文件頁數(shù): 8/32頁
文件大?。?/td> 326K
代理商: LTC4259A
LTC4259A
8
4259Af
PIU
AGND (Pin 21):
Analog Ground. AGND should be con-
nected to the return from the –48V supply. AGND and
DGND should be tied together.
SENSE4 (Pin 22):
Port 4 Current Sense Input. SENSE4
monitors the external MOSFET current via a 0.5
sense
resistor between SENSE4 and V
EE
. Whenever the voltage
across the sense resistor exceeds the overcurrent detec-
tion threshold V
CUT
, the current limit fault timer counts up.
If the voltage across the sense resistor reaches the current
limit threshold V
LIM
(typically 25mV/50mA higher), the
GATE4 pin voltage is lowered to maintain constant current
in the external MOSFET. See Applications Information for
further details. If the port is unused, the SENSE4 pin must
be tied to V
EE
.
GATE4 (Pin 23):
Port 4 Gate Drive. GATE4 should be
connected to the gate of the external MOSFET for port 4.
When the MOSFET is turned on, a 50
μ
A pull-up current
source is connected to the pin. The gate voltage is clamped
to 13V (typ) above V
EE
. During a current limit condition,
the voltage at GATE4 will be reduced to maintain constant
current through the external MOSFET. If the fault timer
expires, GATE4 is pulled down with 50
μ
A, turning the
MOSFET off and recording a t
ICUT
or t
START
event. If the
port is unused, float the GATE4 pin or tie it to V
EE
.
OUT4 (Pin 24):
Port 4 Output Voltage Monitor. OUT4
should be connected to the output port through a 10k
series resistor. A current limit foldback circuit limits the
power dissipation in the external MOSFET by reducing the
current limit threshold when the port voltage is within 18V
of AGND. The port 4 Power Good bit is set when the voltage
from OUT4 to V
EE
drops below 2V (typ). A 2.5M
resistor
is connected internally from OUT4 to AGND. If the port is
unused, the OUT4 pin can be tied to AGND or allowed to
float.
SENSE3 (Pin 25):
Port 3 Current Sense Input. See SENSE4.
GATE3 (Pin 26):
Port 3 Gate Drive. See GATE4.
OUT3 (Pin 27):
Port 3 Output Voltage Monitor. See OUT4.
V
EE
(Pin 28):
–48V Supply Input. Connect to a –48V to
–57V supply, relative to AGND.
SENSE2 (Pin 29):
Port 2 Current Sense Input. See SENSE4.
GATE2 (Pin 30):
Port 2 Gate Drive. See GATE4.
OUT2 (Pin 31):
Port 2 Output Voltage Monitor. See OUT4.
SENSE1 (Pin 32):
Port 1 Current Sense Input. See SENSE4.
GATE1 (Pin 33):
Port 1 Gate Drive. See GATE 4.
OUT1 (Pin 34):
Port 1 Output Voltage Monitor. See OUT4.
AUTO (Pin 35):
Auto Mode Input. Auto mode is intended
to allow the LTC4259A to detect and power up a PD even
if there is no host controller present on the I
2
C bus. The
voltage of the AUTO pin determines the state of the
internal registers when the LTC4259A is reset or comes
out of V
DD
UVLO (see the Register map in Table 1). The
states of these register bits can subsequently be changed
via the I
2
C interface if desired. The real-time state of the
AUTO pin can be read at bit 0 in the Pin Status register
(11h). Pull AUTO high or low with
10k or tie to V
DD
or
DGND.
OSCIN (Pin 36):
Oscillator Input. Connect to an oscillating
signal source, preferably a sine wave, of approximately
100Hz with 2V peak-to-peak amplitude, negative peaks
above –0.3V and positive peaks below 2.5V. When a port
is powered and AC disconnect is enabled, this signal is
amplified and driven onto the appropriate DETECT pin to
determine the AC impedance of the PD.
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