參數(shù)資料
型號: LTC4259A
廠商: Linear Technology Corporation
英文描述: Quad IEEE 802.3af Power over Ethernet Controller with AC Disconnect
中文描述: 四IEEE 802.3af標準與AC電源斷開以太網(wǎng)控制器
文件頁數(shù): 17/32頁
文件大?。?/td> 326K
代理商: LTC4259A
LTC4259A
17
4259Af
Dual-Level Current Limit
A PD is permitted to draw up to 15.4W continuously and
up to 400mA for 50ms. The LTC4259A has two correspond-
ing current limit thresholds, I
CUT
(375mA typ) and I
LIM
(425mA typ). These are given by the equations:
I
CUT
= V
CUT
/R
S
, I
LIM
= V
LIM
/R
S
R
S
is the sense resistor and should be 0.5
for IEEE
802.3af compliance. While the LTC4259A allows the port
current to exceed I
CUT
for a limited time period (see t
ICUT
timing below), it does not allow the current to exceed I
LIM
.
The current limit circuit monitors the port current by
monitoring the voltage across the sense resistor and re-
duces the MOSFET gate voltage as needed to keep the
current at or below I
LIM
. When the current drops below
I
LIM
, the gate voltage is restored to the full value to keep
the MOSFET resistance to a minimum.
t
ICUT
Timing
Whenever more than I
CUT
= V
CUT
/R
S
flows through a port,
the port’s sense voltage is above V
CUT
and the t
ICUT
timer
counts up. If the sense voltage is still above V
CUT
when the
t
ICUT
timer expires, the LTC4259A will turn off the power
to the port immediately and set the appropriate t
ICUT
Fault
bit in register 06h/07h. The t
ICUT
timer duration can be pro-
grammed via register 16h, bits 3 and 2 (Table 1).
The t
ICUT
timer is an up/down counter that is designed to
protect the external MOSFET from thermal stress caused
by repeatedly operating in current limit. The counter
counts up whenever the current is above I
CUT
and counts
down at 1/16th the rate when it is not. The counter will
bottom out at zero to prevent underflow. Full count indi-
cates that the t
ICUT
timer has expired and the port will be
turned off.
This count up/count down behavior implements duty cycle
protection, preventing intermittent current limit faults from
causing cumulative thermal stress in the MOSFET. If the port
enters current limit but then exits before the timer expires,
the count will decrease slowly, giving the I
CUT
timer the
ability to turn off sooner in the case of a repetitive fault. If
the overcurrent duty cycle is less than 6.3% the t
ICUT
timer
will be fully reset.
If the t
ICUT
timer expires and causes the port to shut off, the
timer will continue to run, counting down at the slow
1/16th rate and preventing the port from being repowered
until the count returns to zero. This protects the MOSFET
from damage due to a faulty PD that may still have a valid
signature, or from errant software that repeatedly writes to
the Power On bit.
The port will not repower until after the t
ICUT
counter
returns to zero. In manual and semiauto modes the power
enable command must be received after the t
ICUT
counter
reaches zero. In auto mode the LTC4259A must complete
a valid detection cycle after the t
ICUT
counter reaches zero.
t
START
Timing
To distinguish between normal turn-on current limit be-
havior and current limit faults which occur after power-up
is complete, the LTC4259A starts a timer (the t
START
timer)
whenever a power-up sequence begins.
The t
START
timer serves three functions. First and fore-
most, it allows the user to specify a different current limit
timeout (t
START
instead of t
ICUT
) during turn-on (current
limit duty cycle protection remains functional). Second,
the DC disconnect timer is disabled during this period and
can only begin counting up after the t
START
timer has
expired. Together, these two features let the PD draw the
maximum current I
INRUSH
to charge its input capacitance,
boot up and begin drawing power without triggering a
t
START
fault. Finally, if the device is in current limit for the
entire t
START
period, a t
START
fault will be generated
instead of a t
ICUT
fault. This can be useful for tracking down
the cause of a current fault.
As long as the PD draws less than I
CUT
at the end of t
START
and begins drawing the minimum current within t
DIS
after
t
START
expires (if DC disconnect is enabled), no faults will
be indicated.
The t
START
timer also implements the duty cycle protec-
tion described under t
ICUT
timing and its duration can be
programmed via register 16h, bits 5 and 4 (Table 1).
APPLICATIOU
W
U
U
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