參數(shù)資料
型號(hào)： LTC4223CDHD-2#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 19/24頁(yè)
文件大?。?/td> 290K
描述： IC CNTRLR HOT SWAP DUAL 16-DFN
標(biāo)準(zhǔn)包裝： 73
類型： 熱交換控制器
應(yīng)用： ATCA，MicroTCA?
內(nèi)部開關(guān)： 無(wú)
電源電壓： 2.7 V ~ 6 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 16-DFN（5x4）
包裝： 管件
LTC4223-1/LTC4223-2
19
422312f
 
P
C
V
t
AVG
L
OUT
CHARGE
=
1
2
12
2
"
"
The inrush current can be limited by using the GATE ca-
pacitance (C
G
) so that the power dissipated in the MOSFET
is well within its safe operating area (SOA). For I
GATE
 =
10糀 and C
L1
 = 800糉, we choose C
G
 = 15nF to set the
inrush current to 0.5A.
 
I
C    I
C
A
t
C
V
I
INRUSH
L   GATE
G
CHARGE
L
OUT
=
=
=
1
1
0 5
12
"
.
"
IINRUSH
ms
=19
This results in P
AVG
 = 3W and the MOSFET selected must
be able to tolerate 3W for 19ms. The increase in steady
state junction temperature due to power dissipated in
the MOSFET is 擳 = P
AVG
 " Z
th
 where Z
th
 is the thermal
impedance.
Under this condition, the Si7336ADP datasheets Tran-
sient Thermal Impedance plot indicates that the junction
temperature will increase by 2.4癈 using Z
thJC
 = 0.8癈/W
(single pulse).
The duration and magnitude of the power pulse that results
during a short-circuit condition on the 12V output are a
function of the TIMER capacitance and LTC4223s analog
current limit. The short-circuit duration is given as 0.1糉
" 6[ms/糉] = 600約 for C
T
 = 0.1糉. The maximum short-
circuit current is calculated using the maximum analog
current limit threshold, 擵
SENSE(ACL)(MAX)
 and minimum
R
SENSE
 value.
 
I
V
R
SHORT MAX
SENSE ACL  MAX
SENSE MIN
(    )
(    )(    )
(    )
=
?/DIV>
=
66
mmV
m
A
5 94
11
.
?/DIV>
=
So the maximum power dissipated in the MOSFET is 11A "
12V or 132W for 600約. The Si7336ADP datasheets Tran-
sient Thermal Impedance plot indicates that the worse-case
increase in junction temperature during the short-circuit
condition is 13.2癈 using Z
thJC
 = 0.1癈/W (single pulse).
This will not cause the maximum junction temperature to
be exceeded. The SOA curves of the Si7336ADP are also
checked to be safe under this condition.
APPLICATIONS INFORMATION
 
I
V
R
TRIP MIN
SENSE CB MIN
SENSE MAX
(    )
(   )(    )
(    )
.
=
?/DIV>
=
47 5
mmV
m
A
I
V
R
TRIP MAX
SENSE CB MAX
S
6 06
7 8
.
.
(    )
(   )(    )
?/DIV>
=
=
?/DIV>
EENSE MIN
mV
m
A
(    )
.
.
.
=
=
52 5
5 94
8 8
?/DIV>
For proper operation, I
TRIP(MIN)
 must exceed the maximum
load current with margin, so R
SENSE
 = 6m?should suf ce
for the 12V supply.
The second step is to determine the TIMER capacitance
based on the time required to charge up completely the
output load capacitor on auxiliary supply in active current
limit without exceeding the fault  lter delay. The worst-
case start-up time is calculated using the minimum active
current limit value for the auxiliary supply.
 
t
C
V
I
礔
STUP AUX
L
AUX
AUX ACL  MIN
(    )
(    )(    )
"  .
"
=
=
2
3 3
150
33 3
165
3
.  V
mA
ms
=
For a start-up time of 3ms with a 2x safety margin, the
TIMER capacitance is calculated as:
 
C
t
ms  礔
ms
ms  礔
T
STUP AUX
=
[
]
=
[
]
E
2
123
6
123
0 0
"
/
/
.
(    )
55礔
Considering the tolerances for the TIMER charging rate
and capacitance, a value of 0.1糉 (?0%) for C
T
 should
suf ce.
Since the TIMER charging rate during fault time-out is
20 times faster for the 12V supply as compared to the
auxiliary supply during start-up, this scheme ensures that
the external MOSFET will not overheat under any output-
short condition. The fault  lter delay for the 12V supply
is given by 0.1糉 " 6[ms/糉] = 600約 versus 12ms for
the auxiliary supply.
The next step is to verify that the thermal ratings of the
selected external MOSFET for the 12V supply arent ex-
ceeded during power-up or an output-short.
Assuming the MOSFET dissipates power only due to inrush
current charging the load capacitor, the energy dissipated
in the MOSFET during power-up is the same as that stored
into the load capacitor. The average power dissipated in
the MOSFET is given by:
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