參數(shù)資料
型號(hào)： LTC3773EUHF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PQCC38
封裝： 5 X 7 MM, PLASTIC, MO-220WHKD, QFN-38
文件頁(yè)數(shù)： 6/32頁(yè)
文件大?。?/td> 461K
代理商： LTC3773EUHF
LTC3773
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3773fa
as a Burst Mode switching regulator. Burst Mode op-
eration clamps the minimum peak inductor current to
approximately 20% of the current limit programmed
by RSENSE. As the load current goes down, the EA will
reduce the voltage on the ITH pin. When the ITH voltage
drops below 0.5V, the internal SLEEP signal goes high
and both external MOSFETs are turned off.
In Burst Mode operation, the load current is supplied
by the output capacitor. As the output voltage falls,
the ITH voltage rises. When the ITH voltage reaches
0.55V, the SLEEP signal goes low and the controller
resumes normal operation by turning on the external
top MOSFET at the next cycle of the internal oscillator.
During Burst Mode operation, the inductor current is
not allowed to reverse.
C) Discontinuous Mode Operation: When the PLLIN/FC
pin is oating, Burst Mode operation is disabled but
the inductor current is not allowed to reverse. The 20%
minimum inductor current clamp present in Burst Mode
operation is removed, providing constant frequency
discontinuous operation over the widest possible output
current range. This constant frequency operation is not
quite as efcient as Burst Mode operation, but provides
a lower noise, constant frequency spectrum.
Frequency Synchronization
The selection of switching frequency is a trade off between
efciency and component size. Low frequency opera-
tion increases efciency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The phase-locked loop allows the internal oscillator to be
synchronized to an external source using the PLLIN/FC
pin. The output of the phase detector at the PLLFLTR pin is
also the DC frequency control input of the oscillator, which
operates over a 160kHz to 700kHz range corresponding
to a voltage input from 0V to 2.5V. When locked, the PLL
aligns the turn on of the controller 1 top MOSFET to the
rising edge of the synchronizing signal.
When PLLIN/FC is not being driven by an external clock
source, the PLLFLTR can be oated, tied to VCC or SGND
to select 400kHz, 560kHz or 220kHz switching frequency,
respectively.
Power Good
The PGOOD pin is connected to the drain of an internal
N-channel MOSFET. The MOSFET is turned on under
shutdown state or if any regulator output voltage has
been away from its nominal value by greater than 10%
for more than 100s. To shut off this MOSFET, all three
regulator output voltages must be within the ±10% window
for more than 100s.
Short-Circuit Protection and Current Foldback
Upon start-up, the soft-start action at the TRACK pin limits
the inrush current from the input power source; yet the
controller provides the maximum rated output current to
charge up the output capacitor as quickly as possible. If
TRACK ramps above 0.54V but the output voltage is less
than 70% of its nominal value, foldback current limiting is
activated on the assumption that the output is in a severe
overcurrent and/or short-circuit condition.
Output Overvoltage Protection
As a further protection, the overvoltage comparator (OV)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the VFB pin has risen 3.75% above
the reference voltage of 0.6V, the top gate is turned off
and the bottom gate is turned on until the overvoltage is
cleared.
Undervoltage Lockout
To prevent operation of the external MOSFETs below safe
VCC supply levels, an undervoltage lockout is incorporated
in the LTC3773. When VCC drops below 3.9V, the MOSFET
drivers and all internal circuitry are turned off except for the
undervoltage block and SDB input circuitry. If VDR is lower
than VCC by more than 1V, the drivers are disabled.
(Refer to the Functional Diagram)
OPERATION
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