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參數(shù)資料
| 型號(hào)： | LTC3541EDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 9/20頁(yè) |
| 文件大?。?/td> | 368K |
| 描述： | IC REG DL BCK/LINEAR SYNC 10-DFN |
| 產(chǎn)品培訓(xùn)模塊： | More Information on LDOs |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 拓?fù)洌?/td> | 降壓（降壓）同步（1），線(xiàn)性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開(kāi)關(guān)： | 2.25MHz |
| 電壓/電流 - 輸出 1： | 0.8 V ~ 5 V，500mA |
| 電壓/電流 - 輸出 2： | 0.4 V ~ 4.1 V，300mA |
| 帶 LED 驅(qū)動(dòng)器： | 無(wú) |
| 帶監(jiān)控器： | 無(wú) |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 0.9 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 10-DFN（3x3） |
| 包裝： | 帶卷 (TR) |
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LTC3541
3541fa
PERATIO
need for external pin control. A detailed discussion of the
transitions between the VLDO and linear regulator can be
found in the VLDO/Linear Regulator Loop section.
Buck Regulator Control Loop
The LTC3541 internal buck regulator uses a constant fre-
quency, current mode, step-down architecture. Both the
main (top, P-channel MOSFET) and synchronous (bottom,
N-channel MOSFET) switches are internal. During normal
operation, the internal main switch is turned on at the be-
ginning of each clock cycle provided the internal feedback
voltage to the buck is less than the reference voltage. The
current into the inductor provided to the load increases
until the current limit is reached. Once the current limit is
reached the main switch turns off and the energy stored
in the inductor flows through the bottom synchronous
switch into the load until the next clock cycle.
The peak inductor current is determined by comparing the
buck feedback signal to an internal 0.8V reference. When
the load current increases, the output of the buck and
hence the buck feedback signal decrease. This decrease
causes the peak inductor current to increase until the aver-
age inductor current matches the load current. While the
main switch is off, the synchronous switch is turned on
until either the inductor current starts to reverse direction
or the beginning of a new clock cycle.
When the MODE pin is driven to a logic low, the LTC3541
buck regulator operates in Burst Mode operation for high
efficiency. In this mode, the main switch operates based
upon load demand. In Burst Mode operation the peak
inductor current is set to a fixed value, where each burst
event can last from a few clock cycles at light loads to
nearly continuous cycling at moderate loads. Between
burst events the main switch and any unneeded circuitry
are turned off, reducing the quiescent current. In this sleep
state, the load is being supplied solely from the output
capacitor. As the output voltage droops, an internal error
amplifiers output rises until a wake threshold is reached
causing the main switch to again turn on. This process
repeats at a rate that is dependant upon the load current
demand.
When the MODE pin is driven to a logic high the LTC3541
operates in Pulse-Skip mode for low output voltage ripple.
In this mode, the LTC3541 continues to switch at a constant
frequency down to very low currents, where it will begin
skipping pulses used to control the main (top) switch to
maintain the proper average inductor current.
If the input supply voltage is decreased to a value ap-
proaching the output voltage, the duty cycle of the buck
is increased toward maximum on-time and 100% duty
cycle. The output voltage will then be determined by the
input voltage minus the voltage drop across the main
switch and the inductor.
VLDO/Linear Regulator Loop
In the LTC3541, the VLDO and linear regulator loops consist
of an amplifier and N-channel MOSFET output stages that,
when connected with the proper external components,
will servo the output to maintain a regulator output volt-
age, LV
OUT
. The internal reference voltage provided to the
amplifier is 0.4V allowing for a wide range of output volt-
ages. Loop configurations enabling the VLDO or the linear
regulator are stable with an output capacitance as low as
2.2礔 and as high as 100礔. Both the VLDO and the linear
regulators are capable of operating with an input voltage,
V
IN
, as low as 2.7V, but are subject to the constraint that
V
IN
must be greater than LV
OUT
+ 1.4V.
The VLDO is designed to provide up to 300mA of output
current at a very low LV
IN
to LV
OUT
voltage. This allows
a clean, secondary, analog supply voltage to be provided
with a minimum drop in efficiency. The VLDO is provided
with thermal protection that is designed to disable the
VLDO function when the output, pass transistors junction
temperature reaches approximately 160癈. In addition to
thermal protection, short-circuit detection is provided to
disable the VLDO function when a short-circuit condition is
sensed. This circuit is designed such that an output current
of approximately 1A can be provided before this circuit
will trigger. As detailed in the Electrical Characteristics, the
VLDO regulator will be out of regulation when this event
occurs. Both the thermal and short-circuit faults when
detected are treated as catastrophic fault conditions. The
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相關(guān)代理商/技術(shù)參數(shù) |
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| LTC3542 | 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:500mA, 2.25MHz Synchronous Step-Down DC/DC Converter |
| LTC3542-1 | 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:500mA, 2.25MHz 2.8V Output Synchronous Step-Down DC/DC Converter |
| LTC3542EDC#PBF | 制造商:Linear Technology 功能描述:DC-DC CONVERTER BUCK 2.25MHZ 制造商:Linear Technology 功能描述:DC-DC CONVERTER, BUCK, 2.25MHZ, 500mA, DFN-6; Primary Input Voltage:5.5V; No. of Outputs:1; Output Current:500mA; No. of Pins:6; Operating Temperature Min:-40C; Operating Temperature Max:85C; Package / Case:6-DFN ;RoHS Compliant: Yes |
| LTC3542EDC#TRMPBF | 功能描述:IC REG BUCK SYNC ADJ 0.5A 6DFN RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 產(chǎn)品培訓(xùn)模塊:High Efficiency Current Mode Switching Regulators CMOS LDO Regulators 特色產(chǎn)品:BD91x Series Step-Down Regulators 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:降壓（降壓） 輸出類(lèi)型:兩者兼有 輸出數(shù):2 輸出電壓:3.3V，0.8 V ~ 2.5 V 輸入電壓:4.5 V ~ 5.5 V PWM 型:電流模式 頻率 - 開(kāi)關(guān):1MHz 電流 - 輸出:1.5A 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤(pán) 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:VQFN020V4040 產(chǎn)品目錄頁(yè)面:1373 (CN2011-ZH PDF) 其它名稱(chēng):BD9152MUV-E2TR |
| LTC3542EDC#TRPBF | 功能描述:IC REG BUCK SYNC ADJ 0.5A 6DFN RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 標(biāo)準(zhǔn)包裝:500 系列:- 類(lèi)型:切換式電容器（充電泵），反相 輸出類(lèi)型:固定 輸出數(shù):1 輸出電壓:-3V 輸入電壓:2.3 V ~ 5.5 V PWM 型:Burst Mode? 頻率 - 開(kāi)關(guān):900kHz 電流 - 輸出:100mA 同步整流器:無(wú) 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:TSOT-23-6 其它名稱(chēng):LTC1983ES6-3#TRMTR |
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