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參數(shù)資料
| 型號： | LTC3541EDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 368K |
| 描述： | IC REG DL BCK/LINEAR SYNC 10-DFN |
| 產(chǎn)品培訓模塊： | More Information on LDOs |
| 標準包裝： | 2,500 |
| 拓撲： | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 2.25MHz |
| 電壓/電流 - 輸出 1： | 0.8 V ~ 5 V，500mA |
| 電壓/電流 - 輸出 2： | 0.4 V ~ 4.1 V，300mA |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 0.9 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 10-DFN（3x3） |
| 包裝： | 帶卷 (TR) |
LTC3541
3541fa
The ?/SPAN> denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25癈. V
IN
= 3.6V unless otherwise specified (Note 2)
LECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
I
S
Buck + VLDO
Burst Mode Sleep
V
IN
Quiescent Current
LV
IN
= 1.5V, LV
OUT
= 1.2V, ENBUCK = V
IN
,
ENVLDO = V
IN
, MODE = 0V, I
OUT(VLDO)
= 10礎(chǔ),
V
BUCKFB
= 0.9V
85
礎(chǔ)
Buck + VLDO
Burst Mode Active
V
IN
Quiescent Current
LV
IN
= 1.5V, LV
OUT
= 1.2V, ENBUCK = V
IN
,
ENVLDO = V
IN
, MODE = 0V, I
OUT(VLDO)
= 10礎(chǔ),
V
BUCKFB
= 0.7V
315
礎(chǔ)
Buck + VLDO
Pulse-Skip Mode Active
V
IN
Quiescent Current
LV
IN
= 1.5V, LV
OUT
= 1.2V, ENBUCK = V
IN
,
ENVLDO = V
IN
, MODE = V
IN
, I
OUT(VLDO)
= 10礎(chǔ),
V
BUCKFB
= 0.7V
300
礎(chǔ)
Buck
Burst Mode Sleep
V
IN
Quiescent Current
V
BUCKFB
= 0.9V, I
OUT(BUCK)
= 0A, ENBUCK = V
IN
,
ENVLDO = 0V, MODE = 0V
55
礎(chǔ)
Buck
Burst Mode Active
V
IN
Quiscent Current
V
BUCKFB
= 0.7V, I
OUT(BUCK)
= 0A, ENBUCK = V
IN
,
ENVLDO = 0V, MODE = 0V
300
礎(chǔ)
Buck
Pulse-Skip Mode Active
V
IN
Quiescent Current
V
BUCKFB
= 0.7V, I
OUT(BUCK)
= 0A, ENBUCK = V
IN
,
ENVLDO = 0V, MODE = V
IN
285
礎(chǔ)
Linear Regulator V
IN
Quiescent
Current
LV
OUT
= 1.2V, ENBUCK = 0V, ENVLDO = V
IN
,
I
OUT(LREG)
= 10礎(chǔ)
50
礎(chǔ)
V
IN
Shutdown Quiescent Current ENBUCK = 0V, ENVLDO = 0V
2.5
礎(chǔ)
LV
IN
Shutdown Quiescent Current LV
IN
= 3.6V, ENBUCK = 0V, ENVLDO = 0V
0.1
礎(chǔ)
f
OSC
Oscillator Frequency
?/DIV>
1.8 2.25 2.7 MHz
R
PFET
R
DS(ON)
of P-Channel MOSFET I
SW
= 100mA
0.25
?/DIV>
R
NFET
R
DS(ON)
of N-Channel MOSFET I
SW
= 100mA
0.35
?/DIV>
I
LSW
SW Leakage
Enable = 0V, V
SW
= 0V or 6V, V
IN
= 6V
?.01 ?
礎(chǔ)
V
IH
Input Pin High Threshold
MODE, ENBUCK, ENVLDO
?/DIV>
0.9
V
V
IL
Input Pin Low Threshold
MODE, ENBUCK, ENVLDO
?/DIV>
0.3
V
I
MODE
,
I
ENBUCK
,
I
ENVLDO
Input Pin Current
?/DIV>
?.01 ? 礎(chǔ)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3541 is guaranteed to meet performance specifcations
from 0癈 to 85癈. VLDO/linear regulator output is tested and specified
under pulse load conditions such that T
J
H T
A
, and are 100% production
tested at 25癈. Specifications over the 40癈 to 85癈 operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Minimum operating LV
IN
voltage required for VLDO regulator
regulation is:
LV
IN
e LV
OUT
+ V
DROPOUT
and LV
IN
e 0.9V
Note 4: Minimum operating V
IN
voltage required for VLDO regulator and
linear regulator regulation is:
V
IN
e LV
OUT
+ 1.4V and V
IN
e 2.7V
Note 5: T
J
is calculated from the ambient temperature, T
A
, and power
dissipation, P
D
, according to the following formula:
T
J
= T
A
+ (P
D
" 43癈/W)
Note 6: The LTC3541 is tested in a proprietary test mode that connects
V
BUCKFB
to the output of the error amplifier. For the reference regulation
and line regulation tests, the output of the error amplifier is set to the
midpoint. For the load regulation test, the output of the error amplifier is
driven to minimum and maximum of the signal range.
Note 7: Measurement made in closed loop linear regulator confguration
with LV
OUT
= 1.2V, I
LOAD
= 10礎(chǔ).
Note 8: Measurement made in a proprietary test mode with slope
compensation disabled.
Note 9: Measurement is assured by design, characterization and statistical
process control.
Note 10: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125癈 when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
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