參數(shù)資料
型號(hào): LTC2494CUHF
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
封裝: 5 X 7 MM, PLASTIC, MO-220WKHD, QFN-38
文件頁數(shù): 19/36頁
文件大?。?/td> 675K
代理商: LTC2494CUHF
LTC2494
2494fa
During the conversion, the SCk and the serial data output
pin (SDO) are HIGH (EOC = 1). Once the conversion is
complete, SCk and SDO go LOW (EOC = 0) indicating
the conversion has finished and the device has entered
the sleep state. The device remains in the sleep state a
minimum amount of time (1/2 the internal SCk period)
then immediately begins outputting and inputting data.
The input data is shifted through the SDI pin on the ris-
ing edge of SCk (including the first rising edge) and the
output data is shifted out the SDO pin on the falling edge
of SCk. The data input/output cycle is concluded and a
new conversion automatically begins after the 24th rising
edge of SCk. During the next conversion, SCk and SDO
remain HIGH until the conversion is complete.
The Use of a 10k Pull-Up on SCK for Internal SCK
Selection
If CS is pulled HIGH while the converter is driving SCk
LOW, the internal pull-up is not available to restore SCk
to a logic HIGH state if SCk is floating. This will cause the
device to exit the internal SCk mode on the next falling
edge of CS. This can be avoided by adding an external 10k
pull-up resistor to the SCk pin.
Whenever SCk is LOW, the LTC2494’s internal pull-up at
SCk is disabled. Normally, SCk is not externally driven if
the device is operating in the internal SCk timing mode.
However, certain applications may require an external
driver on SCk. If the driver goes Hi-Z after outputting a
LOW signal, the internal pull-up is disabled. An external
10k pull-up resistor prevents the device from exiting the
internal SCk mode under this condition.
A similar situation may occur during the sleep state when
CS is pulsed HIGH-LOW-HIGH in order to test the conver-
sion status. If the device is in the sleep state (EOC = 0),
SCk will go LOW. If CS goes HIGH before the time tEOCtest,
the internal pull-up is activated. If SCk is heavily loaded,
the internal pull-up may not restore SCk to a HIGH state
before the next falling edge of CS. The external 10k pull-up
resistor prevents the device from exiting the internal SCk
mode under this condition.
applicaTions inFormaTion
Figure 11. Internal Serial Clock, Continuous Operation
10
F
0.1
F
2.7V TO 5.5V
EOC
CS
SCK
(INTERNAL)
SDI
SDO
2494 F11
CONVERSION
DATA INPUT/OUTPUT
CONVERSION
BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 BIT 13 BIT 12 BIT 11
BIT 21
BIT 22
BIT 23
1
0
EN
SGL
A2
A1
A0
EN2
IM
FA
FB
SPD
GS2
GS1
GS0
ODD
BIT 10 BIT 9
BIT 0
2
3
1
4
5
6
7
8
9
10
11
12
13
14
15
16
24
DON'T CARE
MSB
SIG
“0”
VCC
FO
REF+
REF
CH0
CH7
CH8
CH15
COM
SCK
SDI
SDO
CS
GND
28
35
29
30
8
15
16
23
7
38
37
1,3,4,5,6,31,32,33,39
36
34
REFERENCE
VOLTAGE
0.1V TO VCC
ANALOG
INPUTS
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
LTC2494
3-WIRE
SPI INTERFACE
OPTIONAL
10k
VCC
相關(guān)PDF資料
PDF描述
LTC2494IUHF#TR 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
LTC2494IUHF 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
LTC2494CUHF#TR 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
LTC2495IUHF#TR 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
LTC2495CUHF#TR 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
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LTC2495CUHF 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 15sps 16-bit Serial 38-Pin QFN EP