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參數(shù)資料
| 型號： | LTC2493IDE#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT DELTA SIG 14-DFN |
| 標準包裝： | 2,500 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 15 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 480µW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 14-DFN-EP（4x3） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，雙極；2 個差分，雙極 |
| 配用： | DC1010A-A-ND - BOARD DELTA SIGMA ADC LTC2493 |
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LTC2493
14
2493fd
signals to swing beyond ground and VCC. Moreover, the
cancellation does not interfere with the transparent offset
and full-scale auto-calibration and the absolute accuracy
(full-scale + offset + linearity + drift) is maintained even
with external RC networks.
Power-Up Sequence
The LTC2493 automatically enters an internal reset state
when the power supply voltage, VCC, drops below ap-
proximately 2.0V. This feature guarantees the integrity of
the conversion result and input channel selection.
WhenVCCrisesabovethisthreshold,theconvertercreates
an internal power-on reset (POR) signal with a duration
of approximately 4ms. The POR signal clears all internal
registers. The conversion immediately following a POR
cycle is performed on the input channel IN+ = CH0, IN– =
CH1withsimultaneous50Hz/60Hzrejectionand1xoutput
rate. The first conversion following a POR cycle is accurate
within the specification of the device if the power supply
voltage is restored to (2.7V to 5.5V) before the end of the
POR interval. A new input channel, rejection mode, speed
mode, or temperature selection can be programmed into
the device during this first data input/output cycle.
Reference Voltage Range
This converter accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage range
for the REF+ and REF– pins covers the entire operating
range of the device (GND to VCC). For correct converter
operation, VREF must be positive (REF+ > REF–).
The LTC2493 differential reference input range is 0.1V to
VCC. For the simplest operation, REF+ can be shorted to
VCC and REF– can be shorted to GND. The converter out-
put noise is determined by the thermal noise of the front
end circuits and, as such, its value in nanovolts is nearly
constant with reference voltage. A decrease in reference
voltage will not significantly improve the converter’s effec-
tive resolution. On the other hand, a decreased reference
will improve the converter’s overall INL performance.
Input Voltage Range
The analog inputs are truly differential with an absolute,
commonmoderangefortheCH0-CH3andCOMinputpins
extending from GND – 0.3V to VCC + 0.3V. Outside these
limits, the ESD protection devices begin to turn on and
the errors due to input leakage current increase rapidly.
Within these limits, the LTC2493 converts the bipolar dif-
ferential input signal VIN = IN+ – IN– (where IN+ and IN–
are the selected input channels), from –FS = –0.5 VREF
to +FS = 0.5 VREF where VREF = REF+ - REF–. Outside this
range, the converter indicates the overrange or the under-
range condition using distinct output codes (see Table 1).
In order to limit any fault current, resistors of up to 5k
may be added in series with the input. The effect of series
resistanceontheconverteraccuracycanbeevaluatedfrom
the curves presented in the Input Current/Reference Cur-
rent sections. In addition, series resistors will introduce a
temperature dependent error due to input leakage current.
A 1nA input leakage current will develop a 1ppm offset
error on a 5k resistor if VREF = 5V. This error has a very
strong temperature dependency.
I2C INTERFACE
The LTC2493 communicates through an I2C interface. The
I2C interface is a 2-wire open-drain interface supporting
multiple devices and multiple masters on a single bus. The
connected devices can only pull the data line (SDA) low
and can never drive it high. SDA is required to be exter-
nally connected to the supply through a pull-up resistor.
When the data line is not being driven, it is high. Data on
the I2C bus can be transferred at rates up to 100kbits/s
in the standard mode and up to 400kbits/s in the fast
mode. The VCC power should not be removed from the
device when the I2C bus is active to avoid loading the
I2C bus lines through the internal ESD protection diodes.
Each device on the I2C bus is recognized by a unique
address stored in that device and can operate either as a
transmitter or receiver, depending on the function of the
device. In addition to transmitters and receivers, devices
canalsobeconsideredasmastersorslaveswhenperform-
ing data transfers. A master is the device which initiates a
data transfer on the bus and generates the clock signals
applicaTions inForMaTion
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