參數(shù)資料
型號: LTC2493IDE#TRPBF
廠商: Linear Technology
文件頁數(shù): 24/32頁
文件大?。?/td> 0K
描述: IC ADC 24BIT DELTA SIG 14-DFN
標準包裝: 2,500
位數(shù): 24
采樣率(每秒): 15
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 480µW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應商設(shè)備封裝: 14-DFN-EP(4x3)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個單端,雙極;2 個差分,雙極
配用: DC1010A-A-ND - BOARD DELTA SIGMA ADC LTC2493
LTC2493
30
2493fd
package DescripTion
Easy Drive ADCs Simplify Measurement of High
Impedance Sensors
Delta-sigmaADCs,withtheirhighaccuracyandhighnoise
immunity, are ideal for directly measuring many types
of sensors. Nevertheless, input sampling currents can
overwhelm high source impedances or low bandwidth,
micropower signal conditioning circuits. The LTC2493
solves this problem by balancing the input currents, thus
simplifying or eliminating the need for signal conditioning
circuits.
A common application for a delta-sigma ADC is thermistor
measurement. Figure 37 shows two examples of thermis-
tor digitization benefiting from the Easy Drive technology.
The first circuit (applied to input channels CH0 and CH1)
uses balanced reference resistors in order to balance the
common mode input/reference voltage and balance the
differential input source resistance. If reference resistors
R1 and R4 are exactly equal, the input current is zero and
no errors result. If these resistors have a 1% tolerance,
the maximum error in measured resistance is 1.6Ω due
to a shift in common mode voltage; far less than the 1%
error of the reference resistors themselves. No amplifier
is required, making this an ideal solution in micropower
applications.
Easy Drive also enables very low power, low bandwidth
amplifiers to drive the input to the LTC2493. As shown in
Figure 7, CH2 is driven by the LT1494. The LT1494 has
excellent DC specs for an amplifier with 1.5A supply
current (the maximum offset voltage is 150V and the
open-loop gain is 100,000). Its 2kHz bandwidth makes
it unsuitable for driving conventional delta-sigma ADCs.
Adding a 1k, 0.1F filter solves this problem by providing a
charge reservoir that supplies the LTC2493 instantaneous
current, while the 1k resistor isolates the capacitive load
from the LT1494.
Conventional delta-sigma ADCs input sampling current
lead to DC errors as a result of incomplete settling in the
external RC network.
The Easy Drive technology cancels the differential input
current. By balancing the negative input (CH3) with a 1k,
0.1F network errors due to the common mode input
current are cancelled.
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
applicaTions inForMaTion
3.00 ±0.10
(2 SIDES)
4.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ± 0.10
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
3.00 REF
1
7
14
8
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DE14) DFN 0806 REV B
PIN 1 NOTCH
R = 0.20 OR
0.35
× 45°
CHAMFER
0.25 ± 0.05
0.50 BSC
3.30 ±0.10
1.70 ± 0.05
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 ±0.05
0.70 ±0.05
3.60 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
3.30 ±0.05
0.50 BSC
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