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參數(shù)資料
| 型號： | LTC2273IUJ#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| 封裝： | 6 X 6 MM, PLASTIC, QFN-40 |
| 文件頁數(shù)： | 24/44頁 |
| 文件大?。?/td> | 767K |
| 代理商： | LTC2273IUJ#TR |
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LTC2273/LTC2272
30
22732fa
SYNC
REQUEST?
START
IS ISMODE
ENABLED?
NEGATIVE
DISPARITY?
DATA TRANSMISSION
FLOW (SEE FIGURE 18)
TRANSMIT K28.5
AS CODE GROUP 1
WAIT FOR NEXT
FRAME CLOCK
TRANSMIT K28.5
AS CODE GROUP 2
TRANSMIT K28.5
AS CODE GROUP 1
TRANSMIT D5.6
AS CODE GROUP 2
TRANSMIT K28.5
AS CODE GROUP 1
TRANSMIT D16.2
AS CODE GROUP 2
NO
YES
NO
YES
NO
(DISPARITY NOT OK)
(NEGATIVE DISPARITY)
(DISPARITY IS OK)
(POSITIVE DISPARITY)
(NEGATIVE DISPARITY)
22732 F15
YES
APPLICATIONS INFORMATION
Figure 15. Initial Synchronization Flow Diagram
Scrambling
To avoid spectral interference from the serial data output,
an optional data scrambler is added between the ADC
data and the 8B/10B encoder to randomize the spectrum
of the serial link. The scrambler is enabled by setting the
SCRAM pin to a high logic level. The polynomial used for
the scrambler is 1 + x14 + x15, which is a pseudo-random
pattern repeating itself every 215–1. Figure 16 illustrates
the LTC2273/LTC2272 implementation of this polynomial
in parallel form.
The scrambled data is converted into two valid 8B/10B
code groups, constituting a complete frame. The 8B/10B
code groups are then serialized and transmitted.
The receiver is required to deserializing the data, decode
the code-groups into octets and descramble them back
to the original octets using the self-aligning descrambler
shown in Figure 17. This descrambler is shown in 16-bit
parallel form, which is an efcient implementation of the
(1 + x14 + x15) polynomial, operating at the frame clock
rate (ADC sample rate).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2273IUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274CUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274CUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274IUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274IUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2273IUJ-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2273UJ | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2274 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Serial Output ADC |
| LTC2274CUJ | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Serial Output ADC |
| LTC2274CUJ#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 105Msps 16-bit Serial 40-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16-BIT 105MSPS 40-QFN 制造商:Linear Technology 功能描述:IC ADC 16BIT 105MSPS QFN-40 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 105MSPS, QFN-40; Resolution (Bits):16bit; Sampling Rate:105MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:394mA; Digital IC Case Style:QFN; No. of Pins:40 ;RoHS Compliant: Yes |
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