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參數(shù)資料
| 型號： | LTC2209IUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64 |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 593K |
| 代理商： | LTC2209IUP |
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LTC2209
15
2209fb
For LVDS Mode. STANDARD or LOW POWER
SENSE (Pin 1): Reference Mode Select and External
Reference Input. Tie SENSE to VDD to select the internal
2.5V bandgap reference. An external reference of 2.5V or
1.25V may be used; both reference values will set a full
scale ADC range of 2.25V (PGA = 0).
GND (Pins 2, 4, 7, 10, 11, 14, 18): ADC Power Ground.
VCM (Pin 3): 1.25V Output. Optimum voltage for input
common mode. Must be bypassed to ground with a mini-
mum of 2.2F. Ceramic chip capacitors are recommended.
VDD (Pins 5, 6, 15, 16, 17): 3.3V Analog Supply Pin.
Bypass to GND with 1F ceramic chip capacitors.
AIN+ (Pin 8): Positive Differential Analog Input.
AIN– (Pin 9): Negative Differential Analog Input.
ENC+ (Pin 12): Positive Differential Encode Input. The
sampled analog input is held on the rising edge of ENC+.
Internally biased to 1.6V through a 6.2k
Ω resistor. Output
data can be latched on the rising edge of ENC+.
ENC– (Pin 13): Negative Differential Encode Input. The
sampled analog input is held on the falling edge of ENC–.
Internally biased to 1.6V through a 6.2k
Ω resistor. By-
pass to ground with a 0.1F capacitor for a single-ended
Encode signal.
SHDN (Pin 19): Power Shutdown Pin. SHDN = low results
in normal operation. SHDN = high results in powered
down analog circuitry and the digital outputs are set in
high impedance state.
DITH (Pin 20): Internal Dither Enable Pin. DITH = low
disablesinternaldither.DITH=highenablesinternaldither.
Refer to Internal Dither section of the data sheet for details
on dither operation.
D0–/D0+ to D15–/D15+ (Pins 21-30, 33-38, 41-48 and
51-58): LVDS Digital Outputs. All LVDS outputs require
differential100
ΩterminationresistorsattheLVDSreceiver.
D15+/D15– is the MSB.
OGND (Pins 31 and 50): Output Driver Ground.
OVDD (Pins 32 and 49): Positive Supply for the Output
Drivers. Bypass to ground with 0.1F capacitor.
CLKOUT–/CLKOUT+ (Pins 39 and 40): LVDS Data Valid
0utput. Latch data on the rising edge of CLKOUT+, falling
edge of CLKOUT–.
OF–/OF+ (Pins 59 and 60): Over/Under Flow Digital Output
OF is high when an over or under flow has occurred.
LVDS (Pin 61): Data Output Mode Select Pin. Connecting
LVDS to 0V selects full rate CMOS mode. Connecting LVDS
to 1/3VDD selects demultiplexed CMOS mode. Connecting
LVDS to 2/3VDD selects Low Power LVDS mode. Connect-
ing LVDS to VDD selects Standard LVDS mode.
MODE (Pin 62): Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Connecting MODE to 0V selects
offset binary output format and disables the clock duty
cycle stabilizer. Connecting MODE to 1/3VDD selects offset
binary output format and enables the clock duty cycle sta-
bilizer.ConnectingMODEto2/3VDDselects2’scomplement
output format and enables the clock duty cycle stabilizer.
Connecting MODE to VDD selects 2’s complement output
format and disables the clock duty cycle stabilizer.
RAND (Pin 63): Digital Output Randomization Selection
Pin. RAND low results in normal operation. RAND high
selectsD1-D15tobeEXCLUSIVE-ORedwithD0(theLSB).
The output can be decoded by again applying an XOR
operation between the LSB and all other bits. The mode of
operationreducestheeffectsofdigitaloutputinterference.
PGA (Pin 64): Programmable Gain Amplifier Control Pin.
Low selects a front-end gain of 1, input range of 2.25VP-P.
Highselectsafront-endgainof1.5,inputrangeof1.5VP-P.
GND (Exposed Pad Pin 65): ADC Power Ground. The
exposed pad on the bottom of the package must be sol-
dered to ground.
pin Functions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2209IUP#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 160Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN 制造商:Linear Technology 功能描述:IC 16BIT ADC 160MSPS 64QFN 制造商:Linear Technology 功能描述:IC, 16BIT ADC, 160MSPS, 64QFN 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 160MSPS, QFN-64; Resolution (Bits):16bit; Sampling Rate:160MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:440mA; Digital IC Case Style:QFN; No. of Pins:64 ;RoHS Compliant: Yes |
| LTC2209IUP#PBF | 制造商:Linear Technology 功能描述:A/D Converter (A-D) IC |
| LTC2209IUP#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 160Msps 16-bit Parallel/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN |
| LTC2209IUP-14 | 制造商:Linear Technology 功能描述:14-BIT, 160MSPS ADC |
| LTC2209IUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 160Msps ADC |
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