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參數(shù)資料
| 型號(hào)： | LTC2209IUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 593K |
| 代理商： | LTC2209IUP |
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LTC2209
25
2209fb
Figure 14. Descrambling a Scrambled Digital Output
Internal Dither
The LTC2209 is a 16-bit ADC with a very linear transfer
function; however, at low input levels even slight imperfec-
tions in the transfer function will result in unwanted tones.
Small errors in the transfer function are usually a result
of ADC element mismatches. An optional internal dither
mode can be enabled to randomize the input location on
the ADC transfer curve, resulting in improved SFDR for
low signal levels.
As shown in Figure 15, the output of the sample-and-hold
amplifier is summed with the output of a dither DAC. The
dither DAC is driven by a long sequence pseudo-random
number generator; the random number fed to the dither
DAC is also subtracted from the ADC result. If the dither
DAC is precisely calibrated to the ADC, very little of the
dither signal will be seen at the output. The dither signal
thatdoesleakthroughwillappearaswhitenoise.Thedither
DAC is calibrated to result in less than 0.5dB elevation in
the noise floor of the ADC, as compared to the noise floor
with dither off.
Figure 15. Functional Equivalent Block Diagram of Internal Dither Circuit
applications inForMation
D1
D0
D2
D14
D15
LTC2209
PC BOARD
FPGA
CLKOUT
OF
D15/D0
D14/D0
D2/D0
D1/D0
D0
2209 F14
+
–
AIN–
AIN+
S/H
AMP
DIGITAL
SUMMATION
OUTPUT
DRIVERS
MULTIBIT DEEP
PSEUDO-RANDOM
NUMBER
GENERATOR
16-BIT
PIPELINED
ADC CORE
PRECISION
DAC
CLOCK/DUTY
CYCLE
CONTROL
CLKOUT
OF
D15
D0
ENC
DITHER ENABLE
HIGH = DITHER ON
LOW = DITHER OFF
DITH
ENC
ANALOG
INPUT
2209 F15
LTC2209
相關(guān)PDF資料 |
PDF描述 |
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| LTC2215CUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2216CUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2216IUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2216IUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2216CUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2209IUP#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 160Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN 制造商:Linear Technology 功能描述:IC 16BIT ADC 160MSPS 64QFN 制造商:Linear Technology 功能描述:IC, 16BIT ADC, 160MSPS, 64QFN 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 160MSPS, QFN-64; Resolution (Bits):16bit; Sampling Rate:160MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:440mA; Digital IC Case Style:QFN; No. of Pins:64 ;RoHS Compliant: Yes |
| LTC2209IUP#PBF | 制造商:Linear Technology 功能描述:A/D Converter (A-D) IC |
| LTC2209IUP#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 160Msps 16-bit Parallel/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN |
| LTC2209IUP-14 | 制造商:Linear Technology 功能描述:14-BIT, 160MSPS ADC |
| LTC2209IUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 160Msps ADC |
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