20
LTC1967
1967f
V
OUT
= ((5mV AC)
2
+ (0.2mV DC)
2
) " 1.001 + 0.1mV
= 5.109mV
= 5mV + 2.18%
As can be seen, the gain term dominates with large inputs,
while the offset terms become significant with smaller
inputs. In fact, 5mV is the minimum RMS level needed to
keep the LTC1967 calculation core functioning normally,
so this represents the worst-case of usable input levels.
Using the worst-case values of the LTC1967 static errors,
the total conversion error is:
V
OUT
= ((500mV AC)
2
+ (1.5mV DC)
2
) " 1.003 + 0.55mV
= 502.05mV
= 500mV + 0.41%
V
OUT
= ((50mV AC)
2
+ (1.5mV DC)
2
) " 1.003 + 0.55mV
= 50.723mV
= 50mV + 1.45%
V
OUT
= ((5mV AC)
2
+ (1.5mV DC)
2
) " 1.003 + 0.55mV
= 5.786mV
= 5mV + 15.7%
These static error terms are in addition to dynamic error
terms that depend on the input signal. See the Design
Cookbook for a discussion of the DC conversion error with
low frequency AC inputs. The LTC1967 bandwidth limita-
tions cause additional errors with high frequency inputs.
Another dynamic error is due to crest factor. The LTC1967
performance versus crest factor is shown in the Typical
Performance Characteristics.
Output Errors Versus Frequency
As mentioned in the design cookbook, the LTC1967 per-
forms very well with low frequency and very low frequency
inputs, provided a large enough averaging capacitor is used.
However, the LTC1967 will have additional dynamic errors
as the input frequency is increased. The LTC1967 is de-
signed for high accuracy RMS-to-DC conversion of sig-
nals beyond the audible range. The input sampling ampli-
fiers have a 3dB frequency of 2MHz or so. However, the
switched capacitor circuitry samples the inputs at a mod-
est 500kHz nominal. The response versus frequency is
APPLICATIO S I FOR ATIO
U
U
U
depicted in the Typical Performance Characteristics titled
Input Signal Bandwidth. Although there is a pattern to the
response versus frequency that repeats every sample fre-
quency, the errors are not overwhelming. This is because
LTC1967 RMS calculation is inherently wideband, operat-
ing properly with minimal oversampling, or even
undersampling, using several proprietary techniques to
exploit the fact that the RMS value of an aliased signal is
the same as the RMS value of the original signal. However,
a fundamental feature of the ?modulator is that sample
estimation noise is shaped such that minimal noise occurs
with input frequencies much less than the sampling fre-
quency, but such noise peaks when input frequency reaches
half the sampling frequency. Fortunately the LTC1967
output averaging filter greatly reduces this error, but the
RMS-to-DC topology frequency shifts the noise to low
(baseband) frequencies. See Output Noise vs Input Fre-
quency in the Typical Performance Characteristics.
Input Impedance
The LTC1967 true RMS-to-DC converter utilizes a 0.8pF
capacitor to sample the input at a nominal 500kHz sample
frequency. This accounts for the 5M& input impedance.
See Figure 20 for the equivalent analog input circuit. Note
however, that the 5M& input impedance does not directly
affect the input sampling accuracy. For instance, if a 62k
source resistance is used to drive the LTC1967, the
sampling action of the input stage will drag down the
voltage seen at the input pins with small spikes at every
sample clock edge as the sample capacitor is connected to
be charged. The time constant of this combination is
small, 0.8pF " 62k& = 50ns, and during the 500ns period
Figure 20. LTC1967 Equivalent Analog Input Circuit
IN1
V
DD
V
DD
V
SS
V
SS
R
SW
(TYP)
2k
C
EQ
0.8pF
(TYP)
C
EQ
0.8pF
(TYP)
I
IN1
IN2
I
IN2
1967 F20
R
SW
(TYP)
2k
IIN
V   V
R
IIN
V   V
R
R   M
AVG
IN  IN
EQ
AVG
IN   IN
EQ
EQ
1
2
5
1   2
2   1
(  )
=
( )
=
=
&