參數(shù)資料
型號(hào)： LTC1871
廠商： Linear Technology Corporation
英文描述： Quadruple 2-Input Positive-AND Gate 14-TVSOP -40 to 85
中文描述： 寬輸入范圍，無檢測電阻電流模式升壓，反激和SEPIC控制器
文件頁數(shù)： 30/36頁
文件大小： 411K
代理商： LTC1871
30
LTC1871
V
(AC)
200mV/DIV
I
0.5A/DIV
Figure 19. LTC1871 SEPIC Converter Load Step Response
V
IN
= 4.5V
V
OUT
= 12V
V
(AC)
200mV/DIV
I
0.5A/DIV
V
IN
= 15V
V
OUT
= 12V
50
μ
s/DIV
1871 F19a
50
μ
s/DIV
1871 F19b
APPLICATIOU
W
U
U
6. The diode for this design must handle a maximum DC
output current of 2A and be rated for a minimum
reverse voltage of V
IN
+ V
OUT
, or 27V. A 3A, 40V diode
from International Rectifier (30BQ040) is chosen for its
small size, relatively low forward drop and acceptable
reverse leakage at high temp.
7. The output capacitor usually consists of a high valued
bulk C connected in parallel with a lower valued, low
ESR ceramic. Based on a maximum output ripple
voltage of 1%, or 120mV, the bulk C needs to be greater
than:
C
I
V
f
A
V
kHz
F
OUT
OUT MAX
(
0 01
1 5
300
OUT
≥
=
=
μ
)
.
.
.
0 01 12
41
The RMS ripple current rating for this capacitor needs
to exceed:
I
I
V
V
A
V
V
A
RMS COUT
(
O MAX
(
O
IN MIN
(
)
)
)
.
.
≥
=
=
1 5
12
5
2 3
To satisfy this high RMS current demand, two 47
μ
F
Kemet capacitors (T495X476K020AS) are required. As
a result, the output ripple voltage is a low 50mV to
60mV. In parallel with these tantalums, two 10
μ
F, low
ESR (X5R) Taiyo Yuden ceramic capacitors
(TMK432BJ106MM) are added for HF noise reduction.
Check the output ripple with a single oscilloscope probe
connected directly across the output capacitor termi-
nals, where the HF switching currents flow.
8. The choice of an input capacitor for a SEPIC converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design and lab setup, a single 47
μ
F
Kemet tantalum capacitor (T495X476K020AS) is ad-
equate. As with the output node, check the input ripple
with a single oscilloscope probe connected across the
input capacitor terminals. If any HF switching noise is
observed it is a good idea to decouple the input with a
low ESR, X5R ceramic capacitor as close to the V
IN
and
GND pins as possible.
9. The DC coupling capacitor in a SEPIC converter is
chosen based on its RMS current requirement and
must be rated for a minimum voltage of V
IN
plus the AC
ripple voltage. Start with the minimum value which
satisfies the RMS current requirement and then check
the ripple voltage to ensure that it doesn’t exceed the DC
rating.
I
I
V
V
V
A
V
V
V
A
RM( )
O MAX
(
O
IN MIN
(
12
D
)
0 5
)
.
.
.
≥
+
=
+
5
=
1 5
2 4
For this design a single 10
μ
F, low ESR (X5R) Taiyo
Yuden ceramic capacitor (TMK432BJ106MM) is
adequate.
相關(guān)PDF資料
PDF描述
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