參數(shù)資料
型號(hào)： LTC1871
廠商： Linear Technology Corporation
英文描述： Quadruple 2-Input Positive-AND Gate 14-TVSOP -40 to 85
中文描述： 寬輸入范圍，無(wú)檢測(cè)電阻電流模式升壓，反激和SEPIC控制器
文件頁(yè)數(shù)： 28/36頁(yè)
文件大?。?/td> 411K
代理商： LTC1871
28
LTC1871
choice is AVX TPS series of surface mount tantalum. Also,
ceramic capacitors are now available with extremely low
ESR, ESL and high ripple current ratings.
SEPIC Converter: Input Capacitor Selection
The input capacitor of a SEPIC converter is less critical
than the output capacitor due to the fact that an inductor
is in series with the input and the input current waveform
is triangular in shape. The input voltage source impedance
determines the size of the input capacitor which is typically
in the range of 10
μ
F to 100
μ
F. A low ESR capacitor is
recommended, although it is not as critical as for the
output capacitor.
The RMS input capacitor ripple current for a SEPIC con-
verter is:
I
I
RMS CIN
L
(
)
=
1
12
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to the
input of the converter and solid tantalum capacitors can
fail catastrophically under these conditions.
Be sure to
specify surge-tested capacitors!
SEPIC Converter: Selecting the DC Coupling Capacitor
The coupling capacitor C1 in Figure 16 sees nearly a
rectangular current waveform as shown in Figure 17.
During the switch off-time the current through C1 is I
O
(V
O
/
V
IN
) while approximately –I
O
flows during the on-time.
This current waveform creates a triangular ripple voltage
on C1:
=
+
+
V
I
C
f
V
V
V
V
C P P
1
(
O MAX
1
O
IN
O
D
)
(
)
The maximum voltage on C1 is then:
V
V
V
C MAX
1
(
IN
C P P
1
2
)
(
)
=
+
which is typically close to V
IN(MAX)
. The ripple current
through C1 is:
I
I
V
V
V
RM( )
O MAX
(
O
IN MIN
(
D
)
)
1
=
+
The value chosen for the DC coupling capacitor normally
starts with the minimum value that will satisfy 1) the RMS
current requirement and 2) the peak voltage requirement
(typically close to V
IN
). Low ESR ceramic and tantalum
capacitors work well here.
SEPIC Converter Design Example
The design example given here will be for the circuit shown
in Figure 18. The input voltage is 5V to 15V and the output
is 12V at a maximum load current of 1.5A (2A peak).
1. The duty cycle range is:
D
V
V
V
V
V
to
O
+
D
+
IN
O
D
=
+
=
45. %
71. %
2. The operating mode chosen is pulse skipping, so the
MODE/SYNC pin is shorted to INTV
CC
.
3. The operating frequency is chosen to be 300kHz to
reduce the size of the inductors; the resistor from the
FREQ pin to ground is 80k.
4. An inductor ripple current of 40% is chosen, so the peak
input current (which is also the minimum saturation
current) is:
I
I
V
V
V
A
L PEAK
1
(
O MAX
(
O
IN MIN
(
.
D
)
1
2
0 4
2
1
1 5
.
12 0 5
5
4 5
.
)
)
.
=
+
+
=
+
=
χ
The inductor ripple current is:
=
=
=
I
I
D
–
D
A
L
O MAX
(
MAX
MAX
χ
0. .
.
– .
1 0 714
.
)
1
0 714
1 5
APPLICATIOU
W
U
U
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