參數(shù)資料
型號(hào)： LTC1415ISW
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 12-Bit, 1.25Msps, 55mW Sampling A/D Converter
中文描述： 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28
封裝： 0.300 INCH, PLASTIC, SO-28
文件頁(yè)數(shù)： 4/24頁(yè)
文件大小： 481K
代理商： LTC1415ISW
4
LTC1415
(Note 5)
TW U
The
G
denotes specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25
°
C.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND and
AGND wired together unless otherwise noted.
Note 3:
When these pin voltages are taken below ground or above V
DD
,
they will be clamped by internal diodes. This product can handle input
currents greater than 100mA below ground or above V
DD
without latchup.
Note 4:
When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below ground without latchup. These pins are not clamped
to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 1.25MHz, t
r
= t
f
= 5ns unless otherwise
specified.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended +A
IN
input with –A
IN
grounded.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
Note 11:
The falling edge of CONVST starts a conversion. If CONVST
returns high at a critical point during the conversion it can create small
errors. For best performance ensure that CONVST returns high either
within 425ns after the start of the conversion or after BUSY rises.
Note 12:
CS = RD = CONVST = 0V.
SYMBOL
f
SAMPLE(MAX)
PARAMETER
Maximum Sampling Frequency
Conversion and Acquisition Time
Conversion Time
Acquisition Time
CS to RD Setup Time
CS
↓
to CONVST
↓
Setup Time
NAP/SLP
↑
to SHDN
↓
Setup Time
SHDN
↑
to CONVST
↓
Wake-Up Time
CONDITIONS
MIN
1.25
TYP
MAX
UNITS
MHz
G
G
800
700
150
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
CONV
t
ACQ
t
1
t
2
t
3
t
4
G
G
(Notes 9, 10)
(Notes 9, 10)
(Notes 9, 10)
Nap Mode (Note 10)
Sleep Mode, C
REFCOMP
= 10
μ
F (Note 10)
(Notes 10, 11)
C
L
= 25pF
G
0
G
10
200
200
10
t
5
t
6
CONVST
Low Time
CONVST to BUSY Delay
G
50
10
G
60
t
7
Data Ready Before BUSY
↑
20
15
50
–5
35
G
t
8
t
9
t
10
Delay Between Conversions
Wait Time RD
↓
After BUSY
↑
Data Access Time After RD
↓
(Note 10)
G
G
C
L
= 25pF
20
35
45
45
60
30
35
40
G
C
L
= 100pF
25
G
t
11
Bus Relinquish Time
10
0
°
C = T
A
= 70
°
C
–40
°
C = T
A
= 85
°
C
G
G
t
12
t
13
t
14
RD Low Time
CONVST High Time
Aperture Delay of Sample-and-Hold
G
t
10
50
G
–1.5
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