參數(shù)資料
型號(hào)： LTC1090M
廠商： Linear Technology Corporation
英文描述： Single Chip 10-Bit Data Acquisition System
中文描述： 單芯片10位數(shù)據(jù)采集系統(tǒng)
文件頁(yè)數(shù)： 19/28頁(yè)
文件大?。?/td> 344K
代理商： LTC1090M
19
LTC1090
1090fc
3. Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1090 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem.
However, if large source resistances are used or if slow
settling op amps drive the inputs, care must be taken to
insure that the transients caused by the current spikes
settle completely before the conversion begins.
Source Resistance
The analog inputs of the LTC1090 look like a 60pF capaci-
tor (C
IN
) in series with a 500
resistor (R
ON
) as shown in
Figure 9. C
IN
gets switched between the selected “+” and
“–” inputs once during each conversion cycle. Large
external source resistors and capacitances will slow the
settling of the inputs. It is important that the overall RC
time constants be short enough to allow the analog inputs
to completely settle within the allowed time.
“
+
”
INPUT
APPLICATIOU
W
U
U
Figure 9. Analog Input Equivalent Circuit
“+” Input Settling
This input capacitor is switched onto the “+” input during
the sample phase (t
SMPL
, see Figure 10). The sample
phase starts at the 4th SCLK cycle and lasts until the falling
edge of the last SCLK (the 8th, 10th, 12th or 16th SCLK
cycle depending on the selected word length). The voltage
on the “+” input must settle completely within this sample
time. Minimizing R
SOURCE+
and C1 will improve the input
settling time. If large “+” input source resistance must be
used, the sample time can be increased by using a slower
SCLK frequency or selecting a longer word length. With
the minimum possible sample time of 4
μ
s,
R
SOURCE+
< 2k
and C1 < 20pF will provide adequate settling.
“–” Input Settling
At the end of the sample phase the input capacitor switches
to the “–” input and the conversion starts (see Figure 10).
During the conversion, the “+” input voltage is effectively
“held” by the sample and hold and will not affect the
conversion result. However, it is critical that the “–” input
voltage be free of noise and settle completely during the
first four ACLK cycles of the conversion time. Minimizing
R
SOURCE–
and C2 will improve settling time. If large
“–” input source resistance must be used, the time allowed
for settling can be extended by using a slower ACLK
frequency. At the maximum ACLK rate of 2MHz,
R
SOURCE–
< 1k
and C2 < 20pF will provide adequate settling.
Figure 10. “+” and “–” Input Settling Windows
LTC1090 AI17
CS
SCLK
ACLK
t
SMPL
HOLD
1
1ST BIT
TEST
LAST SCLK (8TH, 10TH, 12TH OR 16TH DEPENDING ON WORK LENGTH)
“ – ” INPUT MUST SETTLE
DURING THIS TIME
“ + ” INPUT MUST
SETTLE DURING THIS TIME
2
3
4
1
2
3
4
SAMPLE
MUX ADDRESS
SHIFTED IN
“ – ” INPUT
“ + ” INPUT
LTC1090 AI16
R
SOURCE
+
R
SOURCE
–
V
IN
–
V
IN
+
4TH SCLK
R
ON
= 500
LAST SCLK
C
IN
= 60pF
LTC1090
“
–
”
INPUT
C1
C2
相關(guān)PDF資料
PDF描述
LTC1090MJ Single Chip 10-Bit Data Acquisition System
LTC1091AC 1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
LTC1091ACN8 1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
LTC1091CN8 1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
LTC1093ACN 1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC1090MJ 制造商:LINER 制造商全稱:Linear Technology 功能描述:Single Chip 10-Bit Data Acquisition System
LTC1090MJ/883 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System
LTC1091 制造商:LINER 制造商全稱:Linear Technology 功能描述:1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
LTC1091AC 制造商:LINER 制造商全稱:Linear Technology 功能描述:1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
LTC1091ACJ8 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System
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