參數(shù)資料
型號(hào)： LT6350IMS8#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8
封裝： LEAD FREE, PLASTIC, MSOP-8
文件頁(yè)數(shù)： 9/28頁(yè)
文件大?。?/td> 462K
代理商： LT6350IMS8#TRPBF
LT6350
17
6350fb
APPLICATIONS INFORMATION
The capacitance serves to provide the bulk of the charge
during the sampling process, while the two resistors at the
outputs of the LT6350 are used to dampen and attenuate
any charge injected by the ADC. The RC lter can also be
used to the additional benet of band limiting broadband
output noise. See the Noise Considerations section for
more information.
The selection of the RC time constant depends on the ADC;
but generally, longer time constants will improve SNR at
the expense of longer settling time. Excessive settling time
can introduce gain errors and can cause distortion if the
lter components are not perfectly linear. Note also that
too small of a resistor will not properly dampen the load
transient of the sampling process, prolonging the time
required for settling. 16-bit applications typically require
a minimum settling time of eleven RC time constants of
a rst order lter.
Note that the lter’s series resistance also serves to
decouple the LT6350 outputs from load capacitance. The
outputs of the LT6350 are designed to drive a maximum
of 40pF to ground or 20pF differentially; higher values
of lter capacitor should always be decoupled with lter
resistors of at least 25Ω.
High quality resistors and capacitors should be used in
the RC lter since these components can contribute to
distortion. For lowest distortion, choose capacitors with
a high quality dielectric, such as a C0G multilayer ceramic
capacitor. Metal lm surface mount resistors are more
linear than carbon types.
SETTING THE OUTPUT COMMON MODE VOLTAGE
The output common mode voltage is set by the voltage
applied to pin +IN2 in accordance with Equation (3). The
usable output common mode range is determined by the
input common mode range of the inverting op amp and
is from V– + 1.5V to V+.
In single supply applications, the optimal common mode
input range to the ADC is often determined by the ADC’s
reference. If the ADC has an output pin for setting the input
common mode voltage, it can be directly tied to the +IN2
pin, as long as it is capable of providing the input current
into +IN2 as listed in the Electrical Characteristics Table.
Alternatively, +IN2 may be driven by an external precision
reference such as the LT1790.
For lowest offset, the +IN2 pin should see 499Ω of driving
resistance in all applications (see Offset Considerations).
If the driving resistance is nominally less than 499Ω,
additional resistance can be added to make up the
difference. The resistor noise bandwidth can be reduced
by bypassing the +IN2 pin to the ground plane with a
chip ceramic capacitor of at least 0.1μF (see the Typical
Application on the front page). The bypass capacitance
also helps prevent AC signals on this pin from being
inadvertently converted to differential signals.
SHDN
If the SHDN pin (Pin 7), is pulled low within 300mV of the
negative supply rail, the LT6350 will power down. The pin
is connected through a diode to an internal current source
of 20μA. When pulled below the shutdown threshold, the
20μA current will ow from the pin. If the pin is left open
or pulled high (above V– + 2V), the part will enter normal
active operation, and the current into the pin will be very
small due to the reverse-biased diode.
相關(guān)PDF資料
PDF描述
LT6350IDD#TRPBF 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8
LT6350CMS8#PBF 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8
LT6350IMS8#PBF 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8
LT6350CMS8#TRPBF 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8
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