參數(shù)資料
型號: LT4256-3IGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: Positive High Voltage Hot Swap Controller with Open-Circuit Detect
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁數(shù): 16/20頁
文件大?。?/td> 305K
代理商: LT4256-3IGN
LT4256-3
16
42563f
In some applications it may be possible for V
OUT
to ring
below ground (due to the parasitic trace inductance).
Higher current applications, especially where the output
load is physically far away from the LT4256-3 will be more
susceptible to these transients. This is normal and the
LT4256-3 has been designed to allow for some ringing
below ground. However, if the application is such that
V
OUT
can ring more than 3V below ground, damage may
occur to the LT4256-3 and an external diode, D2, from
ground (anode) to V
OUT
(cathode) will have to be added to
the circuit as shown in Figure 15 (it is critical that the
reverse breakdown voltage of the diode be higher than the
highest expected V
CC
voltage). A capacitor placed from
ground to V
OUT
directly at the LT4256-3 pins can help
reduce the amount of ringing on V
OUT
but it may not be
enough for some applications.
During a fault condition, the LT4256-3 pulls down on
GATE with a switch capable of sinking about 62mA. Once
GATE drops below the output voltage by a diode forward
voltage, the external Zener will forward bias and V
OUT
will
also be discharged to GND. In addition to the GATE
capacitance, the output capacitance will be discharged
through the LT4256-3.
In applications utilizing very large external N-channel
MOSFETs, the possibility exists for the MOSFET to turn on
when initially inserted into a live backplane (before the
APPLICATIU
W
U
U
LT4256-3 becomes active and pulls down on GATE). This
is due to the MOSFET intrinsic drain to gate capacitance
forcing current into R7 and C1 when the drain voltage
steps up from ground to V
CC
with an extremely fast rise
time. To alleviate this situation, a diode, D3, should be put
across R7 with the cathode connected to C1 as shown in
Figure 16.
Whenever the LT4256-3 turns the MOSFET off, GATE pulls
the MOSFET gate to ground with an open collector capable
of sinking 62mA. If the output is held up by a large
reservoir capacitor, the stored energy is dissipated in the
pull-down transistor via a sneak path through the (now
forward biased) Zener, D1. The LT4256-3 has a propri-
etary feature that reduces on-chip power dissipation by
sensing when the MOSFET is off and reducing the pull-
down current significantly. See V
GATE
Turn-Off for more
information about using this feature.
V
GATE
Turn-Off
The LT4256-3 has a proprietary feature that reduces
power dissipation by sensing when the MOSFET is off and
reducing the pull-down current significantly. As the GATE
pin is discharged during any fault, the LT4256-3 monitors
the GATE pin and V
OUT
pin. When the GATE pin is 2V below
V
OUT
, the pull-down current is reduced from 62mA to
about 130
μ
A.
Figure 15. Negative Output Voltage Protection Diode Application
4256 F14
R5
0.010
LT4256-3
SENSE
13
10
5
7
8
16
15
1
2
4
9
V
CC
GATE
FB
12
V
OUT
PWRGD
GND
RETRY
UV
OV
TIMER
V
CC
48V
(SHORT PIN)
Q1
IRF540
D1
CMPZ5241BS
11V
D3
MRA4003T3
R3
4.02k
R2
4.02k
R1
64.9k
R7
100
C1
10nF
R9
4.02k
R6
10
R8
36.5k
V
OUT
48V
4A
R4
51k
C
L
C2
33nF
C3
0.01
μ
F
OPEN
UV = 36V
OV = 73V
PWRGD = 40V
GND
D2
SMAT70A
+
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