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參數(shù)資料
| 型號： | LT1249IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 197K |
| 描述： | IC PFC CTRLR AVERAGE CURR 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 模式： | 平均電流 |
| 頻率 - 開關(guān)： | 100kHz |
| 電流 - 啟動： | 250µA |
| 電源電壓： | 15.5 V ~ 27 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1338 (CN2011-ZH PDF) |
8
LT1249
The Figure 3 circuit therefore has 382V on V
OUT
, and an
overvoltage level = (V
OUT
+ 44V), or 426V. With a 22礎(chǔ)
hysteresis, V
OUT
then has to drop 22V to 404V before
feedback recovers and the switch turns back on.
M
OUT
is a high impedance current output. In the current
loop, offset line current is determined by multiplier offset
current and input offset voltage of the current amplifier.
A negative 4mV current amplifier V
OS
translates into
20mA line current and 5W input power for 250V line if
0.2& sense resistor is used. Under no load or when the
load power is less than this offset input power, V
OUT
would
slowly charge up to an overvoltage state because the
overvoltage comparator can only reduce multiplier output
current to zero. This does not guarantee zero output
current if the current amplifier has offset. To regulate V
OUT
under this condition, the amplifier M1 (see Block Dia-
gram), becomes active in the current loop when VA
OUT
goes down to 1V. The M1 can put out up to 15礎(chǔ) to the 4k
resistor at the inverting input to cancel the current ampli-
fier negative V
OS
and keep V
OUT
error to within 2V.
Undervoltage Lockout
The LT1249 turns on when V
CC
is higher than 16V and
remains on until V
CC
falls below 10V, whereupon the chip
enters the lockout state. In the lockout state, the LT1249
only draws 250礎(chǔ), the oscillator is off, the V
REF
and the
GTDR pins remain low to keep the power MOSFET off.
Start-Up and Supply Voltage
The LT1249 draws only 250礎(chǔ) before the chip starts at
16V on V
CC
. To trickle start, a 90k resistor from the power
line to V
CC
supplies the trickle current and C4 holds the V
CC
up while switching starts (see Figure 4). Then the auxiliary
winding takes over and supplies the operating current.
Note that D3 and the large value C3, in both Figures 4 and
5, are only necessary for systems that have sudden large
load variation down to minimum load and/or very light
load conditions. Under these conditions, the loop may
exhibit a start/restart mode because switching remains off
long enough for C4 to discharge below 10V. The C3 will
hold V
CC
up until switching resumes. For less severe load
variations, D3 is replaced with a short and C3 is omitted.
The turns ratio between the primary winding and the
APPLICATIONS INFORMATION
U
U
U
V
CC
R1
90k
1W
18V
1249 F05
+
C3
390礔
35V
C4
56礔
35V
+
LINE
MAIN INDUCTOR
C2
1000pF
450V
D3
D1
D2
Figure 5. Power Supply for LT1249
auxiliary winding determines V
CC
according to: V
OUT
/(V
CC
2V) = N
P
/N
S
. For 382V V
OUT
and 18V V
CC
, N
P
/N
S
H 19.
In Figure 5 a new technique for supply voltage eliminates
the need for an extra inductor winding. It uses capacitor
charge transfer to generate a constant current source
which feeds a Zener diode. Current to the Zener is equal to
(V
OUT
V
Z
)(C)(f), where V
Z
is Zener voltage and f is
switching frequency. For V
OUT
= 382V, V
Z
= 18V, C =
1000pF and f = 100kHz, Zener current will be 36mA. This
is enough to operate the LT1249, including the FET gate
drive.
Output Capacitor
The peak-to-peak 120Hz output ripple is determined by:
V
P-P
= (2)(I
LOAD
DC)(Z)
where I
LOAD
DC: DC load current
Z: capacitor impedance at 120Hz
For 180礔 at 300W load, I
LOAD
DC = 300W/385V = 0.78A,
V
CC
N
P
N
S
R1
90k
1W
C1
2礔
1249 F04
+
+
C2
2礔
C3
390礔
+
C4
56礔
+
LINE
ALL CAPACITORS ARE RATED 35V
MAIN INDUCTOR
D2
D3
D1
Figure 4. Power Supply for LT1249
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