參數(shù)資料
型號: LT1249IS8#PBF
廠商: Linear Technology
文件頁數(shù): 6/12頁
文件大?。?/td> 197K
描述: IC PFC CTRLR AVERAGE CURR 8SOIC
標準包裝: 100
模式: 平均電流
頻率 - 開關: 100kHz
電流 - 啟動: 250µA
電源電壓: 15.5 V ~ 27 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 管件
產(chǎn)品目錄頁面: 1338 (CN2011-ZH PDF)
6
LT1249
PIN FUNCTIONS
U
U
V
SENSE
(Pin 6): This is the inverting input to the voltage
amplifier.
V
CC
 (Pin 7): This is the supply of the chip. The LT1249 has
a very fast gate driver required to fast charge high power
MOSFET gate capacitance. High current spikes occur
during charging. For good supply bypass, a 0.1礔 ceramic
capacitor in parallel with a low ESR electrolytic capacitor,
56礔 or higher is required in close proximity to IC GND.
GTDR (Pin 8): The MOSFET gate driver is a 1.5A fast totem
pole output. It is clamped at 15V. Capacitive loads like
MOSFET gates may cause overshoot. A gate series resis-
tor of at least 5& will prevent the overshoot.
APPLICATIONS INFORMATION
U
U
U
Error Amplifier
The error amplifier has a 100dB DC gain and 1.5MHz unity-
gain frequency. It is internally clamped at 12V. The nonin-
verting input is tied to the 7.5V reference.
Current Amplifier
The multiplier output current I
M
 flows out of the M
OUT
 pin
through the 4k resistor R
MOUT
 and develops the reference
signal to the current loop that is controlled by the current
amplifier. Current gain is the ratio of R
MOUT
 to line current
sense resistor. The current amplifier is a transconductance
amplifier. Typical g
m
 is 320祄ho and gain is 60dB with no
load. The inverting input is internally tied to GND. The
noninverting input is tied to the multiplier output. The
output is internally clamped at 8V. Output resistance is
about 4M; DC loading should be avoided because it will
lower the gain and introduce offset voltage at the inputs
which becomes a false reference signal to the current loop
and can distort line current. Note that in the current
averaging operation, high gain at twice the line frequency
is necessary to minimize line current distortion. Because
CA
OUT
 may need to swing 5V over one line cycle at high line
condition, 11mV will be present at the inputs of the current
amplifier if gain is rolled off to 450 at 120Hz (1nF in series
with 10k at CA
OUT
). At light load, when (I
M
)(R
MOUT
) can be
less than 100mV, lower gain will distort the current loop
reference signal and line current. If signal gain at the
100kHz switching frequency is too high, the system
behaves more like a current mode system and can cause
subharmonic oscillation. Therefore, the current amplifier
should be compensated to have a gain of less than 15 at
100kHz and more than 300 at 120Hz.
Multiplier
The multiplier is a current multiplier with high noise
immunity in a high power switching environment. The
current gain is:
I
M
 = (I
AC
)(I
EA
2
)/(200礎)
2
, and
I
EA
 = (VA
OUT
  1.5V)/25k
With a square function, because of the lower gain at light
power load, system stability is maintained and line current
distortion caused by the AC ripple fed back to the error
amplifier is minimized. Note that switching ripple on the
high impedance lines could get into the multiplier from the
I
AC
 pin and cause instability. The LT1249 provides an
internal 25k resistor in series with the low impedance
multiplier current input so that only a capacitor from the
I
AC
 pin to GND is needed to filter out the noise. Maximum
multiplier output current is limited to 250礎. Figure 1
shows the multiplier transfer curves.
Figure 1. Multiplier Current I
M
 vs I
AC
 and VA
OUT
I
AC
 (礎)
0
300
150
0
1249 G04
250
500
VA
OUT
 = 6.5V
VA
OUT
 = 6V
VA
OUT
 = 5.5V
VA
OUT
 = 5V
VA
OUT
 = 4.5V
VA
OUT
 = 4V
VA
OUT
 = 3.5V
VA
OUT
 = 3V
VA
OUT
 = 2.5V
VA
OUT
 = 2V
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